嵌入式系统应用-ADC-模拟电压采集-肖迎春.ppt

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1、嵌入式系统应用,肖迎春 Email:Tel：,2,目录,任务1:ADC-模拟电压采集STM32 ADC介绍,3,STM32的A/D转换器,STM32单片机有2个独立的ADC控制器，有18个通道，可测量16个外部信号和2个内部信号源：内部温度传感器和内部参考电压(Bandgap voltage)。ADC 电源要求:2.4V to 3.6 V。ADC 输入范围:VREF-VIN VREF+(VREF+and VREF-available only in LQFP100 package)精度：12位。结果可按左对齐或右对齐的方式存放在16位寄存器中。A/D转换的过程：采用、保持、量化、编程。采样时间

2、越长，转换结果越稳定。采样时间可设置为：1.5个/7.5个/13.5个/28.5个ADC时钟周期。ADC转换时间 采用时间+转换时间转换时间：12.5个时钟周期。,4,STM32的A/D转换器,转换速率：ADC1和ADC2连在APB2总线上（其最高速率72MHz）。CLK控制器为ADC时钟提供一个专用的可编程预分频器，预分频值为：STM32的ADC允许的最高时钟频率为14MHz，若超过会降低精度，因此需要对CLK进行分频。最快转换时间：最高转换速率：,5,STM32的A/D转换器,转换模式：单次/连续/扫描/间断/双重。扫描模式如果没有启动，则启动一次AD转换只会转换第一个通道；扫描模式如果启

3、动，则启动一次AD转换会对所有通道进行转换。如果是单次模式，启动后一次转换完成后不再转换，如果是连续模式，则一次转换完后继续反复转换。STM32的16个外部ADC通道可分为两组:规则的和注入的。每个组可以是这16个通道中的任意一些通道以任意顺序进行的组合。规则组最多有16个通道，通道和转换顺序在ADC规则系列寄存器x(ADC_JSQR)中选择。注入组最多有4个通道。通道和转换顺序在ADC注入系列寄存器(ADC_JSQR)中选择。,6,STM32的A/D转换器,ADC端口：PA0PA7:ADC_IN0ADC_IN7 PB0PB1:ADC_IN8ADC_IN9 PC0PC5:ADC_IN10ADC

4、_IN15输入信号量程：VREF-VREF+(03.3V)本电路板的模拟电压（电位器）连在PC0端口。,7,任务1:ADC模拟电压采集,任务：编程从STM32的ADC采集电位器上的模拟电压，通过串口输出到PC上，串口终端接收显示出来目的：掌握STM32 ADC的应用及库函数的使用步骤：建立自己的项目文件夹建立Keil工程项目，命名为ADC.uvproj,保存到MDK目录下项目中添加main.c、retarget.c和标准外设库STM32StdPeriphLib.lib配置好C/C+头文件路径和调试工具参数将实验板上的跳线J61,J62接到RS232&RS485端，跳线J59,J60接到RS23

5、2端；连接好仿真器和实验板编译、下载程序 打开PC机上的串口终端，选择正确的端口和波特率调整电位R2，观察串口接收窗口的数据 修改代码，将ADC的数值转换为实际电压值，通过串口将结果发回PC，同时在电压值2.5V时蜂鸣器报警；,8,任务1：配置,头文件路径配置：,1、C/C+配置,2、H文件路径,3、添加路径:.App.INC.INCCMSIS_INC,9,任务1：配置,Debug配置：,1、Debug配置,10,任务1：配置,下载工具配置：,1、下载工具配置,2、设置,3、添加下载算法：Stm32F10 x Connectivity Line,11,ADC库函数功能描述,USART标准库函数

6、的说明参考课本p335表C.9在软件开发时，adc标准库函数的参数使用，可以参考头文件stm32f10 x.h、stm32f10 x_adc.h,12,使用STM32 ADC的步骤,调用RCC_APB2PeriphClockCmd()库函数使能对应IO口的时钟RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOC|RCC_APB2Periph_ADC1|RCC_APB2Periph_GPIOD|RCC_APB2Periph_AFIO,ENABLE);调用GPIO_Init()配置IO口的模式/PC0 作为模拟通道10输入引脚 GPIO_InitStructure

7、.GPIO_Pin=GPIO_Pin_0;GPIO_InitStructure.GPIO_Mode=GPIO_Mode_AIN;GPIO_Init(GPIOC,13,使用STM32 ADC的步骤,ADC_Init()初始化,ADC_RegularChannelConfig()设置通道和转化顺序及时间，ADC_Cmd()使能/*ADC1 configuration-*/ADC_InitStructure.ADC_Mode=ADC_Mode_Independent;ADC_InitStructure.ADC_ScanConvMode=ENABLE;ADC_InitStructure.ADC_Con

8、tinuousConvMode=ENABLE;ADC_InitStructure.ADC_ExternalTrigConv=ADC_ExternalTrigConv_None;ADC_InitStructure.ADC_DataAlign=ADC_DataAlign_Right;ADC_InitStructure.ADC_NbrOfChannel=1;ADC_Init(ADC1,14,使用STM32 ADC的步骤,重置校验寄存器，等待重置完成，开始校验，等待校验完成/*Enable ADC1 reset calibaration register*/ADC_ResetCalibration(A

9、DC1);/*Check the end of ADC1 reset calibration register*/while(ADC_GetResetCalibrationStatus(ADC1);/*Start ADC1 calibaration*/ADC_StartCalibration(ADC1);/*Check the end of ADC1 calibration*/while(ADC_GetCalibrationStatus(ADC1);/*Start ADC1 Software Conversion*/ADC_SoftwareStartConvCmd(ADC1,ENABLE);调

10、用ADC_GetConversionValue获取结果AD_value=ADC_GetConversionValue(ADC1);,15,ADC库函数,void ADC_DeInit(ADC_TypeDef*ADCx);void ADC_Init(ADC_TypeDef*ADCx,ADC_InitTypeDef*ADC_InitStruct);void ADC_StructInit(ADC_InitTypeDef*ADC_InitStruct);void ADC_Cmd(ADC_TypeDef*ADCx,FunctionalState NewState);void ADC_DMACmd(ADC

11、_TypeDef*ADCx,FunctionalState NewState);void ADC_ITConfig(ADC_TypeDef*ADCx,uint16_t ADC_IT,FunctionalState NewState);void ADC_ResetCalibration(ADC_TypeDef*ADCx);FlagStatus ADC_GetResetCalibrationStatus(ADC_TypeDef*ADCx);void ADC_StartCalibration(ADC_TypeDef*ADCx);FlagStatus ADC_GetCalibrationStatus(

12、ADC_TypeDef*ADCx);void ADC_SoftwareStartConvCmd(ADC_TypeDef*ADCx,FunctionalState NewState);FlagStatus ADC_GetSoftwareStartConvStatus(ADC_TypeDef*ADCx);void ADC_DiscModeChannelCountConfig(ADC_TypeDef*ADCx,uint8_t Number);void ADC_DiscModeCmd(ADC_TypeDef*ADCx,FunctionalState NewState);,16,ADC库函数,void

13、ADC_RegularChannelConfig(ADC_TypeDef*ADCx,uint8_t ADC_Channel,uint8_t Rank,uint8_t ADC_SampleTime);void ADC_ExternalTrigConvCmd(ADC_TypeDef*ADCx,FunctionalState NewState);uint16_t ADC_GetConversionValue(ADC_TypeDef*ADCx);uint32_t ADC_GetDualModeConversionValue(void);void ADC_AutoInjectedConvCmd(ADC_

14、TypeDef*ADCx,FunctionalState NewState);void ADC_InjectedDiscModeCmd(ADC_TypeDef*ADCx,FunctionalState NewState);void ADC_ExternalTrigInjectedConvConfig(ADC_TypeDef*ADCx,uint32_t ADC_ExternalTrigInjecConv);void ADC_ExternalTrigInjectedConvCmd(ADC_TypeDef*ADCx,FunctionalState NewState);void ADC_Softwar

15、eStartInjectedConvCmd(ADC_TypeDef*ADCx,FunctionalState NewState);FlagStatus ADC_GetSoftwareStartInjectedConvCmdStatus(ADC_TypeDef*ADCx);void ADC_InjectedChannelConfig(ADC_TypeDef*ADCx,uint8_t ADC_Channel,uint8_t Rank,uint8_t ADC_SampleTime);void ADC_InjectedSequencerLengthConfig(ADC_TypeDef*ADCx,uin

16、t8_t Length);,17,ADC库函数,void ADC_SetInjectedOffset(ADC_TypeDef*ADCx,uint8_t ADC_InjectedChannel,uint16_t Offset);uint16_t ADC_GetInjectedConversionValue(ADC_TypeDef*ADCx,uint8_t ADC_InjectedChannel);void ADC_AnalogWatchdogCmd(ADC_TypeDef*ADCx,uint32_t ADC_AnalogWatchdog);void ADC_AnalogWatchdogThres

17、holdsConfig(ADC_TypeDef*ADCx,uint16_t HighThreshold,uint16_t LowThreshold);void ADC_AnalogWatchdogSingleChannelConfig(ADC_TypeDef*ADCx,uint8_t ADC_Channel);void ADC_TempSensorVrefintCmd(FunctionalState NewState);FlagStatus ADC_GetFlagStatus(ADC_TypeDef*ADCx,uint8_t ADC_FLAG);void ADC_ClearFlag(ADC_T

18、ypeDef*ADCx,uint8_t ADC_FLAG);ITStatus ADC_GetITStatus(ADC_TypeDef*ADCx,uint16_t ADC_IT);void ADC_ClearITPendingBit(ADC_TypeDef*ADCx,uint16_t ADC_IT);*函数说明参考 课本 附录C表C.9，p335页,18,STM32的ADC介绍,ADC 转换率达 1 MHz，精度为12位ADC 电源要求:2.4V to 3.6 VADC 输入范围:VREF-VIN VREF+(VREF+and VREF-available only in LQFP100 pac

19、kage)Dual mode(on devices with 2 ADCs):8 conversion mode多达18个通道:16 external channels 2 internal channels:与温度传感器和内部参考电压连接(Bandgap voltage)Channels conversion groups:Up to 16 channels regular groupUp to 4 channels injected groupSingle and continuous conversion modes,19,STM32的ADC介绍,自动从通道 0 到通道 n 进行转换的扫

20、描模式Channel by channel programmable sampling time and conversion orderDiscontinuous mode on regular and injected groupsSelf-calibrationLeft or right Data alignment with inbuilt data coherencyAnalog Watchdog on high and low thresholdsInterrupt generation on:End of ConversionEnd of Injected conversionA

21、nalog watchdogDMA capability(only on ADC1),20,ADC Block Diagram,21,ADC Regular channels group,Programmable number of regular channels:Up to 16 channelsProgrammable sample time and order of each channel in the conversion sequenceConversion started by:Software through start bitExternal trigger generat

22、ed by:Timer1 CC1 Timer1 CC2Timer1 CC3Timer2 CC2 Timer3 TRGOTimer4 CC4EXTI Line11,22,ADC Injected channels group,Programmable number of injected channels:Up to 4 channelsProgrammable sample time and order of each channel in the conversion sequenceConversion started by:JAUTO:automatic injected convers

23、ion after regular channels conversionSoftware through start bitExternal trigger generated by:Timer1 TRGO Timer1 CC4Timer2 TRGOTimer2 CC1 Timer3 CC4Timer4 TRGOEXTI Line15,23,Analog sample time,ADCCLK,up to 14MHz,taken from PCLK2 through a prescaler(Div2,Div4,Div6 and Div8)Three bits programmable samp

24、le time cycles for each channel:1.5 cycles 7.5 cycles13.5 cycles28.5 cycles41.5 cycles55.5 cycles71.5 cycles239.5 cyclesTotal conversion=Sample time+12.5 cycles(fixed time)14MHz and Sample time=1.5cycle total conversion:1s(14 cycles),ADC,ADCCLK,ADC Prescalers:Div2,Div4,Div6 and Div8,PCLK2,55.5 cycle

25、s,7.5 cycles,71.5 cycles,41.5 cycles,13.5 cycles,28.5 cycles,1.5 cycles,239.5 cycles,Sample Time Selection,SMPx2:0,24,ADC conversion modes,Four conversion mode are available:,CHx,Start,Stop,CHx,Start,Stop,.,CHn,CHx,Start,CHx,Start,.,CHn,Single channel single conversion mode,Multi-channels(Scan)singl

26、e conversion mode,Multi-channels(Scan)continuous conversion mode,Single channel continuous conversion mode,25,ADC discontinuous conversion mode,Split channels conversion sequence into sub-sequencesAvailable for both regular and injected groups:Up to 8 conversion for regular channel1 conversion for i

27、njected channel,Example:-Conversion of channels:0,1,2,4,5,8,9,11,12,13,14 and 15-Discontinuous mode Number of channel is 3,Channel0,Channel1,Channel2,Channel4,Channel5,Channel8,Channel9,Channel11,Channel12,Channel13,Channel14,Channel15,1st trigger,2nd trigger,3rd trigger,4th trigger,End of Conversio

28、n,Channel0,Channel1,Channel2,5th trigger,Note:Do not use discontinuous mode for both regular and injected together.It can be used only for one group channel,26,ADC Data alignment,One bit data align selection:right or leftFor injected channel conversion negative value after subtraction of the offset

29、the sign is extended in right alignment,SEXT,SEXT,SEXT,SEXT,D11,D10,D9,D8,D7,D6,D5,D4,D3,D2,D1,D0,Right alignment,0,0,0,0,D11,D10,D9,D8,D7,D6,D5,D4,D3,D2,D1,D0,SEXT,0,0,0,D11,D10,D9,D8,D7,D6,D5,D4,D3,D2,D1,D0,Left alignment,0,0,0,0,D11,D10,D9,D8,D7,D6,D5,D4,D3,D2,D1,D0,Regular group,Injected group,R

30、egular group,Injected group,27,ADC Analog Watchdogs,12-bit programmable analog watchdog low and high thresholdsEnabled on one,some or all converted channels:one regular or/and injected channel,all injected or/and regular channels.Interrupt generation on low or high thresholds detection,Status Regist

31、er,Analog Watchdog,Low Threshold,Temp Sensor,VREFINT,ADC_IN0,ADC_IN1,ADC_IN15,.,High Threshold,28,DMA,DMA available only on ADC1DMA request generated on each ADC1 end of regular channel conversion(Not in injected channels),Example:-Conversion of regular channels:0,1,2,3,4,5,6,7 and 8-Converted ata s

32、tored in ConvertedValue_Tab9-DMA transfer enabled(destination address auto incremented),Channel0,Channel1,Channel2,Channel3,Channel4,Channel5,Channel6,Channel7,Channel8,DMA Request,Channel0 conversion result,Channel1 conversion result,Channel2 conversion result,Channel3 conversion result,Channel4 co

33、nversion result,Channel5 conversion result,Channel6 conversion result,Channel7 conversion result,Channel8 conversion result,ADC1 DR register,.,DMA Request,DMA Request,DMA Request,DMA Request,DMA Request,DMA Request,DMA Request,DMA Request,ConvertedValue_Tab9,Note:EOC flag cleared at end of regular c

34、hannels conversion due to DMA access to ADC1 DR register,29,ADC dual modes(1/9),Available in devices with two ADCs:ADC1 master and ADC2 slaveADC1 and ADC2 triggers are synchronized internally for regular and injected channels conversion8 ADC dual modes,GPIOPorts,Temp Sensor,VREFINT,Up to 4 injected

35、channels,Up to 16 regular channels,ADC_IN0,ANALOG MUX,ADC_IN1,ADC_IN15,ADC1Analog,ADC2Analog,Digital Master,Digital Slave,External event synchronization,External event(Regular group),External event(Injected group),Data register,EOC/JEOC,30,ADC dual modes(2/9)Injected simultaneous mode,CH0,CH1,CH2,CH

36、3,CH15,CH13,CH1,CH2,Converts an injected channel group The external trigger source,which start the conversion,comes from ADC1(simultaneous trigger provided to ADC2)An end of injected conversion is generated at the end of all channels conversionResults stored on injected data registers of each ADC.,N

37、ote:Do not convert the same channel on the two ADCs,ADC2,ADC1,Injected simultaneous mode on 4 injected channels,Sampling,Conversion,Trigger for injected channels,End of Injected Conversion on ADC1 and ADC2,31,ADC dual modes(3/9)Regular simultaneous mode,CH0,CH1,CH2,CH3,CH15,CH14,CH13,CH12,Converts a

38、 regular channel group The external trigger source,which start the conversion,comes from ADC1(simultaneous trigger provided to ADC2)An end of conversion is generated at the end of all channels conversionResults stored on ADC1 regular data register(32bits),Note:Do not convert the same channel on the

39、two ADCs,ADC2,ADC1,Regular simultaneous mode on 16 regular channels,Sampling,Conversion,Trigger for regular channels,End of Conversion on ADC1 and ADC2,CH15,CH0,32,ADC dual modes(4/9)Fast Interleaved mode,CH0,CH0,Converts a regular channel group(usually one channel)The external trigger source,which

40、start the conversion,comes from ADC1:ADC2 starts immediately on ADC1 triggerADC1 starts after a delay of 7 ADC clock cyclesAn end of conversion is generated at the end of all channels conversionResults stored on ADC1 regular data register(32bits),ADC2,ADC1,Fast Interleaved mode on 1 regular channel

41、in continuous conversion mode,Sampling,Conversion,Trigger for regular channels,End of Conversion on ADC1,7 ADCCLK cycles,CH0,CH0,CH0,CH0,End of Conversion on ADC2,Note:-The maximum sampling time allowed is less than 7 ADC clock cycles,33,ADC dual modes(5/9)Slow Interleaved mode,CH0,CH0,Converts a re

42、gular channel group(only one channel)The external trigger source,which start the conversion,comes from ADC1:ADC2 starts immediately on ADC1 triggerADC1 starts after a delay of 14 ADC clock cyclesAn end of conversion is generated at the end of all channels conversionResults stored on ADC1 regular dat

43、a register(32bits)A new ADC2 start is automatically generated after 28 ADC clock cycles,Note:-The maximum sampling time allowed is less than 14 ADC clock cycles-Continuous conversion mode is not supported,ADC2,ADC1,Slow Interleaved mode on 1 regular channel,Sampling,Conversion,Trigger for regular ch

44、annel,End of Conversion on ADC1,14 ADCCLK cycles,CH0,CH0,28 ADCCLK cycles,End of Conversion on ADC1,34,ADC dual modes(6/9)Alternate Trigger mode,CH0,Converts an injected channel group The external trigger source,which start the conversion,comes from ADC1(in case of injected discontinuous mode enable

45、d):On 1st trigger,the first injected group channel in ADC1 is convertedOn 2nd trigger,the first injected group channel in ADC2 is convertedOn 3rd trigger,the second injected group channel in ADC1 is convertedAn end of injected conversion is generated at the end of all channels conversionResults stor

46、ed on injected data registers of each ADC.,ADC1,ADC2,Alternate Trigger mode on 4 injected channels(injected discontinuous mode enabled),Sampling,Conversion,2nd Trigger,JEOC on ADC2,CH11,CH1,CH12,CH13,CH2,CH3,1st Trigger,4th Trigger,6th Trigger,8th Trigger,3rd Trigger,5th Trigger,7th Trigger,CH10,JEO

47、C on ADC1,35,ADC dual modes(7/9)Combined Regular/Injected simultaneous mode,CH0,CH1,CH1,CH2,CH3,CH2,CH2,CH1,Converts an injected and a regular channels groups The external triggers sources,which start the conversions,comes from ADC1(simultaneous trigger provided to ADC2):injected simultaneous mode c

48、an interrupt the other oneAn end of injected conversion is generated at the end of all injected channels conversion and an end of conversion is generated at the end of all regular channelsResults of injected channels stored on injected data registers of each ADC,and regular channels on ADC1 data reg

49、ister(32bits),Note:Do not convert the same channel on the two ADCs,ADC2,ADC1,Combined Regular/Injected simultaneous mode on 4 regular channels and 2 injected channels,Sampling,Conversion,Trigger for regular channels,End of Conversion on ADC1 and ADC2,CH10,CH11,CH15,CH14,ADC2,ADC1,Trigger for injecte

50、d channels,End of Injected Conversion on ADC1 and ADC2,regular simultaneousmode interrupted byinjected simultaneous one,CH3,CH0,36,ADC dual modes(8/9)Combined Regular simultaneous+Alternate Trigger mode,CH0,CH1,CH1,CH3,CH3,CH2,CH2,CH0,Converts an injected and regular channels groups The external tri