图像信息原理教学课件电荷耦合器件v2.ppt
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1、电荷耦合器件,(Charge Coupled Device,CCD),固体成像器件,电荷耦合器件CCD(Charge Coupled Device,CCD),互补金属氧化物半导体 CMOS图像传感器(Complementary Metal Oxide Semiconductor,CMOS),电荷耦合器件CCD,线阵CCD,面阵CCD,表面沟道CCD(SCCD),电荷包存储在半导体与绝缘体之间的界面,并沿界面转移。,体沟道CCD(BCCD),电荷包存储在离半导体表面一定深度的体内,并在半导体内沿一定方向转移,CCD类型,1.电荷耦合器件的工作原理,1.1、CCD工作原理,CCD,光信息,电脉冲,
2、脉冲只反映一个光敏元的受光情况,脉冲幅度的高低反映该光敏元受光照的强弱,输出脉冲的顺序可以反映一个光敏元的位置,完成图像传感,特点:以电荷作为信号,基本功能:电荷的存贮和转移,CCD基本工作原理,信号电荷的产生,信号电荷的存贮,信号电荷的传输,信号电荷的检测,1.1.1 电荷存贮,CCD 是由规则排列的金属氧化物半导体(Metal Oxide Semiconductor,MOS)电容阵列组成。,Metal,Oxide,Semiconductor,如果有光入射到半导体硅片上,在光子的作用下,半导体硅产生电子空穴对,由此产生的光电子被表面的势阱所吸收。而空穴被电场排斥出耗尽区。,当在金属电极上加正
3、电压VG时,在电场的作用下,电极下型区域里的多数载流子空穴被排斥、驱赶,形成了一个耗尽区。,而对于少数载流子电子,电场则吸引它到电极下的耗尽区。耗尽区对于带负电的电子来讲是一个势能很低的区域称为“势阱”。,势阱积累电子的容量取决于势阱的“深度”,而表面势的大小近似与栅压VG成正比。,势阱内吸收的光电子数量与入射光势阱附近的光强成正比。这样一个MOS结构单元就称光敏单元或一个象素;而将一个势阱所吸收集的若干个光生电荷称为一个电荷包。,通常在半导体硅片上制有成千上万个相互独立的MOS光敏单元,如果在金属电极上加上正电压,则在半导体硅片上就形成成千上万的个相互独立的势阱。如果此时照射在这些光敏单元上
4、是一副明暗起伏的图像,那么这些光敏元就会产生出一幅与光照强度相对应的光电荷图像,因而得到影像信号。,1.1.2.电荷耦合,CCD器件每一单元(每一像素)称为一位,有256位、1024位、2160位等线阵CCD。CCD一位中含的MOS电容个数即为CCD的相数,通常有二相、三相、四相等几种结构,它们施加的时钟脉冲也分为二相、三相、四相。二相脉冲的两路脉冲相位相差1800;三相及四相脉冲的相位差分别为1200、900。当这种时序脉冲加到CCD驱动电路上循环时,将实现信号电荷的定向转移及耦合。,图所示TCD1206的相邻两像元,每一位含MOS电容2个,取表面势增加的方向向下,工作过程如图所示:,at=
5、t1时,1电极处于高电平,而2电极处于低电平。由于1电极上栅压大于开启电压,故在1下形成势阱,假设此时光敏二极管接收光照,它每一位(每一像元)的电荷都从对应的1电极下放入势阱。,b t=t2时,1电极上栅压小于2电极上栅压,故1电极下势阱变浅,势阱变深,电荷更多流向2电极下。(由于势阱的不对称性,“左浅右深”,电荷只能朝右转移,c t=t3时,2电极处于高电平,而1电极处于低电平,故电荷聚集到2电极下,实现了电荷从1电极下到2电极下的转移。,d 同理可知,t=t4时,电荷包从上一位的1电极下转移到下一位的1电极下。因此,时钟脉冲经过一个周期,电荷包在CCD上移动一位。,1.1.3 电荷注入,光
6、注入方式 当光照射到CCD硅片上时,在栅极附近的体内产生电子空穴对,其多数载流子被栅极电压排开,少数载流子则被其收集到势阱中形成信号电荷。,在CCD中,电荷注入分为两类:光注入和电注入。,N为入射光的光子流速率;A为光敏单元的受光面积,t为光注入时间,1.1.4 电荷检测,CCD输出结构的作用是将CCD中信号电荷变为电流或电压输出,以检测信号电荷的大小。,浮置扩散放大器属于电压输出方式,目前采用较多。其基本结构和工作原理如下:,如图所示,给出了CCD的电压输出电路。,放大管T1,复位管T2,输出二极管T3,此电荷积分器随T2管的开与关,处于选通和关闭状态,称为选通电荷积分器,放大管T1是源跟随
7、器,复位管T2工作在开关状态,输出二极管T3始终处于强反偏状态,A点的等效电容C由T3管的结电容加上T1管的栅电容构成,它构成一个电荷积分器,如图所示为电压输出工作波形图。,CCD电压输出工作原理为:在每个时钟脉冲周期内,随着时钟脉冲1或2的下降过程,就有一个电荷包从CCD转移到输出二极管T3的N区,即转移到电荷积分器上,引起A点电位变化为:,由于MOS管T1的电压增益为,式中gm为电导,RL为负载电阻,故T1管源极输出电压变化为:,对Vout进行读出,然后T2管栅极RG在复位脉冲R的作用下导通,将电荷包Q通过T2管的沟道抽走,使A点电位重新置在VRD值,为下一次Vout读出作准备。,因为是N
8、沟道,信息电荷为电子,故加负号,当R结束,T2管关闭后,由于T1管处于A点的VRD电位的强反偏状态,此积分器无放电回路,所以A点电位一直维持在VRD值,直到下一个时钟脉冲信号电荷到来为止。,CCD Analogy,A common analogy for the operation of a CCD is as follows:An number of buckets(Pixels)are distributed across a field(Focal Plane of a telescope)in a square array.The buckets are placed on top o
9、f a series of parallel conveyor belts and collect rain fall(Photons)across the field.The conveyor belts are initially stationary,while the rain lowly fills the buckets(During the course of the exposure).Once the rain stops(The camera shutter closes)the conveyor belts start turning and transfer the b
10、uckets of rain,one by one,to a measuring cylinder(Electronic Amplifier)at the corner of the field(at the corner of the CCD)The animation in the following slides demonstrates how the conveyor belts work.,RAIN(PHOTONS),BUCKETS(PIXELS),VERTICALCONVEYORBELTS(CCD COLUMNS),HORIZONTALCONVEYOR BELT(SERIAL R
11、EGISTER),MEASURING CYLINDER(OUTPUT AMPLIFIER),CCD Analogy,Exposure finished,buckets now contain samples of rain.,Conveyor belt starts turning and transfers buckets.Rain collected on the vertical conveyoris tipped into buckets on the horizontal conveyor.,Vertical conveyor stops.Horizontal conveyor st
12、arts up and tips each bucket in turn intothe measuring cylinder.,After each bucket has been measured,the measuring cylinderis emptied,ready for the next bucket load.,A new set of empty buckets is set up on the horizontal conveyor and the process is repeated.,Eventually all the buckets have been meas
13、ured,the CCD has been read out.,Structure of a CCD 1.,The image area of the CCD is positioned at the focal plane of the telescope.An image then builds up that consists of a pattern of electric charge.At the end of the exposure this pattern is then transferred,pixel at a time,by way of the serial reg
14、ister to the on-chip amplifier.Electrical connections are made to the outside world via a series of bond pads and thin gold wires positioned around the chip periphery.,Connection pins Gold bond wires Bond pads Silicon chip,Metal,ceramic or plastic package,Image area,Serial register,On-chip amplifier
15、,Structure of a CCD 2.,CCDs are are manufactured on silicon wafers using the same photo-lithographic techniques used to manufacture computer chips.Scientific CCDs are very big,only a few can be fitted onto a wafer.This is one reason that they are so costly.The photo below shows a silicon wafer with
16、three large CCDs and assorted smaller devices.A CCD has been produced by Philips that fills an entire 6 inch wafer!It is the worlds largest integrated circuit.,Don Groom LBNL,Structure of a CCD 3.,One pixel,Channel stops to define the columns of the image,Transparenthorizontal electrodesto define th
17、e pixels vertically.Also used to transfer the charge during readout,Plan View,Cross section,The diagram shows a small section(a few pixels)of the image area of a CCD.This pattern is reapeated.,ElectrodeInsulating oxiden-type siliconp-type silicon,Every third electrode is connected together.Bus wires
18、 running down the edge of the chip make the connection.The channel stops are formed from high concentrations of Boron in the silicon.,Structure of a CCD 4.,On-chip amplifierat end of the serial register,Cross section ofserial register,Image Area,Serial Register,Once again every third electrode is in
19、 the serial register connected together.,Below the image area(the area containing the horizontal electrodes)is the Serial register.This also consists of a group of small surface electrodes.There are three electrodes for every column of the image area,Structure of a CCD 5.,The serial register is bent
20、 double to move the output amplifier away from the edgeof the chip.This useful if the CCD is to be used as part of a mosaic.The arrows indicate how charge is transferred through the device.,Edge of Silicon,160mm,Image Area,Serial Register,Read Out Amplifier,Bus wires,Photomicrograph of a corner of a
21、n EEV CCD.,Structure of a CCD 6.,OD,OS,RD,SW,Output Node,Substrate,Output Transistor,Reset Transistor,SummingWell,20mm,Output Drain(OD),Output Source(OS),Gate of Output Transistor,Output Node,Reset Drain(RD),Summing Well(SW),Last few electrodes in Serial Register,Serial Register Electrodes,Photomicr
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