电子通信类专业毕业设计（论文）外文翻译.doc

《电子通信类专业毕业设计（论文）外文翻译.doc》由会员分享，可在线阅读，更多相关《电子通信类专业毕业设计（论文）外文翻译.doc（20页珍藏版）》请在三一办公上搜索。

1、The application of microcontrollerin closed caption systemAbstractThis paper describes our newly designed microcontrollers for Closed Caption system application. These microcontrollers integrate the Closed Caption decoding function and other functions required for TV set control.1. IntroductionMicro

2、controllers that utilize the Closed Caption function have been developed. The Closed Caption decoding function must be provided for all TV sets sold in the U.S.fr on July 1993.These basic system development guidelines were as follows: (1) The system must provide stabilized reception. (2) The system

3、should offer low-cost operation.The key word for this development was full-function. In regulations established on April 12,1991, the FCC specified the text mode as being optional, thus reflecting that committee on low-cost systems. With our goal of supplying Closed Caption hardware as a new informa

4、tion medium, we decided to develop a system satisfying the specifications for all options. Last year we introduced the add-on type of Closed Caption Decoder LSI kit designed for easy installation into existing TV sets. The Closed Caption decoding function is implemented efficiently by microcontrolle

5、rs described in this paper. The high-performanceOn-Screen Display function for Closed Caption application can be used for easy TV set operation.This new microcontroller is a low cost, high accuracy instrumentation that requires only one external resistor to set gains of 1 to 10,000. Furthermore, Thi

6、s new microcontroller features 32-lead SOIC and DIP packaging that is smaller than discrete designs and offers lower power, making it a good fit for closed caption system and portable (or remote) applications. This new microcontroller, with its high accuracy of 40 ppm maximum nonlinearity, low offse

7、t voltage of 50 V max, and offset drift of 0.6 V/C max, is ideal for use in precision data acquisition systems transducer interfaces. Furthermore, the low noise, low input bias current, and low power of This new microcontroller make it well suited for medical applications, such as ECG and noninvasiv

8、e blood pressure monitors. The low input bias current of 1.0 nA max is made possible with the use of processing in the input stage. This new microcontroller works well as a preamplifier due to its low input voltage noise of 9 nV/Hz at 1 kHz, 0.28 V p-p in the 0.1 Hz to 10 Hz band, and 0.1 pA/Hz inpu

9、t current noise. Also, This new microcontroller is well suited for multiplexed applications with its settling time of 15 s to 0.01%, and its cost is low enough to enable designs with one DUT per channel.2. System OverviewOur new microcontrollers provide TV systems with the Closed Caption function wh

10、en used with the Front End LSI. Since the Front End LSI is designed with bipolar technology, it provides very stable operation even under weak or abnormal signal conditions. The microcontrollers employ an 8-bit CPU core and integrate the Closed Caption decoding function and all functions required fo

11、r TV set control. This series of microcontrollers consist of an EP-ROM version, OTPROM version, and mask-ROM versions of 8K, 12K, 16K, 20K, 24K, 28K and 32K-byte ROM capacity. Except for ROM capacity, all other functions are exactly the same for simple installation into different types of TV sets. A

12、 microcontroller and the Front End LSI can replace the existing tuner microcontroller providing the Closed Caption decoding function. Therefore, a stable decoding function can be provided without a large expenditure for parts.2.1 Front End This LSI receives the composite video signal from the video

13、signal processor and extracts the Caption Data from the signal. This LSI contains a bipolar device with a synchronizing separator circuit. By generating the Horizontal synchronizing signal and Vertical synchronizing signal by itself, this device extracts the caption signal from line 21. This LSI has

14、 two AFC blocks. AFC1 is the standard AFC block to stabilize the VCO (Voltage Controlled Oscillator) to 32MH. The signal from the video and another signal from the Horizontal C/D divided VCO output are sent to AFC1. AFC2 is the additional AFC block to synchronize the phase of VCO output for the capt

15、ion signal. This design enables the clock to be regenerated with the frequency and phase synchronized. This LSI detects line 21 and only outputs the sliced signal， VCO output as clocks during the data period. In other words, clocks, data and the transmission signal (TRANS) are output during line 21

16、of each field. In addition, this LSI discriminates between odd and even fields and transfers the signal (O/E).2.2 Microcontroller System ConfigurationThe microcontroller consists of the CPU and other functions needed for TV control, such as the Closed Caption On-Screen Display function (OSD), remote

17、 control input circuit with a noiseelimination function, PWM output capable of video system control, sound system control, A/D converter capable of detecting AFT, key-in input, and serial I/O. All of these functions and the CPU are packaged on a single chip. A control code sets the display format, p

18、osition, and four attributes: color, italics, underline, and flash. The subsequent characters are positioned as specified in the OSD Display RAM with these attributes. The decoded data is stored in the display RAM, then is converted to the R, G, B, and BL signals by using the Generator ROM informati

19、on. The R, G, B, and BL signals are synchronized to the vertical and horizontal synchronization signals, and to the dot clock generated by the built-in circuit. These signals carry the attribute information and font data that will be displayed on the screen according to current display format.3. Clo

20、sed Caption On-Screen Display Function3.1 Circuit ConfigurationThe Closed Caption On-screen Display function (OSD) consists of the control block, Display RAM, Character Generator ROM, output block and oscillation circuit. The control block consists of the mode and timing control circuit, the vertica

21、l position control circuit, and the horizontal position control circuit. This block controls the access timing of the Display RAM anddisplays output in various display modes. The closed caption data in each field, which is level sliced and captured by the LSI, is serially transferred to the Data Reg

22、ister of this microcontroller. The trailing edge of the signal generates an interrupt. This interrupt causes the software to judge the fields, check data parity, and decode caption data. The data length of the Display RAM is eight bits. To support the Caption Text mode and reduce the burden on softw

23、are under On-Screen Display control, the Display RAM is adaptable to a full-screen size. Each row consists of one column used for the initial attribute value, and 32 columns used for the display area. The Character Generator ROM has a capacity of 112 pre-set character fonts in Closed Caption format

24、and 16 character fonts. The output block control character output according to the display format used in each mode.3.2 Existing Display RAM ArchitectureIf the timing of on-screen display is synchronized to the CPU clock, jitter occurs horizontally. This is why that timing must be synchronized to th

25、e deflection system. Therefore, a dual-port RAM structure is generally used in the Display RAM for the TV control microcontroller to enable asynchronous access from the CPU and OSD circuit. However, a dual-port RAM requires more space and increases cost, therefore； a smaller-capacity Display RAM is

26、usually provided to solve this problem. In this case, the Display RAM can hold only the data for a small part of the screen. To display an entire screen, the Display RAM data must be changed each time the display position is moved to another group of rows. This requires the display control routine o

27、f the program to be executed very quickly. Therefore, program has to be designed very carefully with special design techniques, thus, program will be complicated and it takes longer design period.3.3 Display RAM Architecture of this MicrocontrollerTo implement caption mode display, at least 256 byte

28、s of memory are necessary to store the data. In the full-screen Text Mode, 480 bytes of memory are necessary to store the data. This amount of memory must be prepared either as display memory or data memory. Based on our study and examination, we believe that the Display RAM architecture described b

29、elow facilitates the most efficient implementation possibility:(1) Provide the RAM with full-screen capability and the display data memory functions.(2) Employ the single port structure of this RAM that can be accessed simultaneously from the CPU and display control circuit with no restrictions. The

30、se measures solve the problems described in Section 3.2 and minimize the cost of providing Text Mode capability.4. Single Port RAM implementation4.1 Timing allocation on single port Display RAMDisplay RAM is accessed through the row address and column address synchronized by the CPU clock. For acces

31、s from the CPU, the row address is specified by the row address register; the column address is specified by the column address register. For access from the caption display circuit, the row address of the Display RAM is determined by the vertical position of the character to be displayed. The colum

32、n address of the Display RAM is determined by the horizontal position of the character to be displayed. The 32 characters have to be displayed in one line and each character consists of an eight-dot horizontal attribute specification code according to the mode used. Italics, flash, underline, and ch

33、aracter color are specified in the caption and text modes. Character background color and character color are specified in 16-line OSD mode and 8-line OSD mode.5. Other Features in OSD ModeThe following OSD mode features are also provided:- 8 character colors- 8 character background/fringe colors- 8

34、 full screen background colors- Normal-size, double-size, and quadruple-size character- Smooth scroll functionThe high performance OSD function is ideal for menu-driven systems. Figure 8 shows an sample of a menu-driven system that uses a display format.6. Software Support SystemJuly 1,1993 is the d

35、eadline for all TV manufacturers to implement the closed caption system. To complete development in this limited time, the software support system is very important. To make programming more efficient, we developed a development tool with real time debugging capability and source line debugging capa

36、bility. The real time capability is enabled by special system configuration. The development tool is directly built into the personal computer bus. With this method, the internal registers of the microcontroller can be displayed onscreen in real time. With source line debugging function, every debug

37、ging operations, such as break, trace, or step function can be executed on source line. The source line debugging function is also supported on the C language. Paperless debugging can be done with this function. We also provides the caption module for application program user. Since the caption modu

38、le can be interfaced with user application programs via the RAM mailbox, the caption module can be included in the application program as a black box without any modification.7. Other aspects7.1 Reference terminal The reference terminal potential defines the zero output voltage and is especially use

39、ful when the load does not share a precise ground with the rest of the system. It provides a direct means of injecting a precise offset to the output, with an allowable range of 2 V within the supply voltages. Parasitic resistance should be kept to a minimum for optimum CMR.7.2 Input protection This

40、 new microcontroller features 400 of series resistance at its inputs and will safely withstand input overloads of up to 15 V or 60 mA for several hours. This is true for all gains and power on and off, which is particularly important since the signal source and amplifier may be powered separately. F

41、or longer time periods, the current should not exceed 6 mA. For input overloads beyond the supplies, clamping the inputs to the supplies will reduce the required resistance, yielding lower noise7.3 Common-mode rejection This new microcontroller, offer high CMR, which is a measure of the change in ou

42、tput voltage when both inputs are changed by equal amounts. These specifications are usually given for a full-range input voltage change and a specified source imbalance. For optimal CMR, the reference terminal should be tied to a low impedance point, and differences in capacitance and resistance sh

43、ould be kept to a minimum between the two inputs. In many applications, shielded cables are used to minimize noise; for best CMR over frequency, the shield should be properly driven. 7.4 Ground returns for input bias currents Input bias currents are those currents necessary to bias the input transis

44、tors of these microcontrollers. There must be a direct return path for these currents. Therefore, when amplifying input sources, such as transformers or ac-coupled sources, there must be a dc path from each input to ground. Refer to A Designers Guide to these microcontrollers for more information re

45、garding applications. 7.5 Simplified Schematic of this microcontrollerThis new microcontroller is a new microcontroller based on a modification of the classic approach. Absolute value trimming allows the user to program gain accurately (to 0.15% at G = 100) with only one resistor. Monolithic constru

46、ction and laser wafer trimming allow the tight matching and tracking of circuit components, thus ensuring the high level of performance inherent in this circuit. The input transistors Q1 and Q2 provide a single differential-pair bipolar input for high precision, yet offer 10 lower input bias current

47、 thanks to processing. Feedback through the Q1-A1-R1 loop and the Q2-A2-R2 loop maintains constant collector current of the input devices Q1 and Q2, thereby impressing the input voltage across the external gain setting resistor RG. This creates a differential gain from the inputs to the A1/A2 output

48、s given by G = (R1 + R2)/RG + 1. The unity-gain subtractor, A3, removes any common-mode signal, yielding a single-ended output referred to the REF pin potential. The value of RG also determines the transconductance of the preamp stage. As RG is reduced for larger gains, the transconductance increase

49、s asymptotically to that of the input transistors. This has three important advantages: (a) Open-loop gain is boosted for increasing programmed gain, thus reducing gain related errors. (b) The gain-bandwidth product (determined by C1 and C2 and the preamp transconductance) increases with programmed gain, thus optimizing frequency response. (c) The input voltage noise is reduced to a value of 9 nV/Hz, determined mainly by the collector current and base resistance