DE2115所有引脚分配表.docx

上传人：牧羊曲112

文档编号：3155512

上传时间：2023-03-11

格式：DOCX

页数：44

大小：43.57KB

《DE2115所有引脚分配表.docx》由会员分享，可在线阅读，更多相关《DE2115所有引脚分配表.docx（44页珍藏版）》请在三一办公上搜索。

1、DE2115所有引脚分配表表 1 拨动开关引脚配置 Signal Name SW0 FPGA Pin No. PIN_AB28 Description I/O Standard Slide Switch0 Slide Switch1 Slide Switch2 Slide Switch3 Slide Switch4 Slide Switch5 Slide Switch6 Slide Switch7 Slide Switch8 Slide Switch9 Slide Switch10 Slide Switch11 Slide Switch12 Slide Depending on JP7 Dep

2、ending on JP7 Depending on JP7 Depending on JP7 Depending on JP7 Depending on JP7 Depending on JP7 Depending on JP7 Depending on JP7 Depending on JP7 Depending on JP7 Depending on JP7 Depending on JP7 Depending on SW1 PIN_AC28 SW2 PIN_AC27 SW3 PIN_AD27 SW4 PIN_AB27 SW5 PIN_AC26 SW6 PIN_AD26 SW7 PIN_

3、AB26 SW8 PIN_AC25 SW9 PIN_AB25 SW10 PIN_AC24 SW11 PIN_AB24 SW12 PIN_AB23 SW13 PIN_AA24 Switch13 SW14 PIN_AA23 Slide Switch14 Slide Switch15 Slide Switch16 Slide Switch17 JP7 Depending on JP7 Depending on JP7 Depending on JP7 Depending on JP7 SW15 PIN_AA22 SW16 PIN_Y24 SW17 PIN_Y23 表 2 按钮开关引脚配置 Signa

4、l Name KEY0 FPGA Pin No. PIN_M23 Description I/O Standard Push-button0 Depending on JP7 Push-button1 Depending on JP7 Push-button2 Depending on JP7 Push-button3 Depending on JP7 KEY1 PIN_M21 KEY2 PIN_N21 KEY3 PIN_R24 表 3 LED 引脚配置 Signal Name LEDR0 LEDR1 LEDR2 LEDR3 LEDR4 FPGA Pin No. PIN_G19 PIN_F19

5、 PIN_E19 PIN_F21 PIN_F18 Description I/OStandard LED Red0 2.5V LED Red1 2.5V LED Red2 2.5V LED Red3 2.5V LED Red4 2.5V LEDR5 LEDR6 LEDR7 LEDR8 LEDR9 PIN_E18 PIN_J19 PIN_H19 PIN_J17 PIN_G17 LED Red5 2.5V LED Red6 2.5V LED Red7 2.5V LED Red8 2.5V LED Red9 2.5V LED Red10 LED Red11 LED Red12 LED Red13 L

6、ED Red14 LED Red15 LED Red16 LED Red17 LED Green0 LED Green1 LED Green2 LED Green3 2.5V LEDR10 PIN_J15 LEDR11 PIN_H16 2.5V LEDR12 PIN_J16 2.5V LEDR13 PIN_H17 2.5V LEDR14 PIN_F15 2.5V LEDR15 PIN_G15 2.5V LEDR16 PIN_G16 2.5V LEDR17 PIN_H15 2.5V LEDG0 PIN_E21 2.5V LEDG1 PIN_E22 2.5V LEDG2 PIN_E25 2.5V

7、LEDG3 PIN_E24 2.5V LEDG4 PIN_H21 LED Green4 LED Green5 LED Green6 LED Green7 LED Green8 2.5V LEDG5 PIN_G20 2.5V LEDG6 PIN_G22 2.5V LEDG7 PIN_G21 2.5V LEDG8 PIN_F17 2.5V 表 4 七段数码管引脚配置 Signal Name HEX00 FPGA Pin No. PIN_G18 Description I/O Standard Seven Segment Digit 2.5V 00 Seven Segment Digit 2.5V

8、01 Seven Segment Digit 2.5V 02 Seven Segment Digit Depending on 03 JP7 Seven Segment Digit Depending on 04 JP7 Seven Segment Digit Depending on 05 JP7 Seven Segment Digit Depending on 06 JP7 Seven Segment Digit Depending on 10 JP7 Seven Segment Digit Depending on HEX01 PIN_F22 HEX02 PIN_E17 HEX03 PI

9、N_L26 HEX04 PIN_L25 HEX05 PIN_J22 HEX06 PIN_H22 HEX10 PIN_M24 HEX11 PIN_Y22 11 HEX12 PIN_W21 JP7 Seven Segment Digit Depending on 12 JP7 Seven Segment Digit Depending on 13 JP7 Seven Segment Digit Depending on 14 JP7 Seven Segment Digit Depending on 15 JP7 Seven Segment Digit Depending on 16 JP7 Sev

10、en Segment Digit Depending on 20 JP7 Seven Segment Digit Depending on 21 JP7 Seven Segment Digit Depending on 22 JP7 Seven Segment Digit Depending on 23 JP7 Seven Segment Digit Depending on 24 JP7 Seven Segment Digit Depending on 25 JP7 Seven Segment Digit Depending on 26 JP7 Seven Segment Digit Dep

11、ending on 30 JP7 Seven Segment Digit Depending on 31 JP7 Seven Segment Digit Depending on HEX13 PIN_W22 HEX14 PIN_W25 HEX15 PIN_U23 HEX16 PIN_U24 HEX20 PIN_AA25 HEX21 PIN_AA26 HEX22 PIN_Y25 HEX23 PIN_W26 HEX24 PIN_Y26 HEX25 PIN_W27 HEX26 PIN_W28 HEX30 PIN_V21 HEX31 PIN_U21 HEX32 PIN_AB20 32 HEX33 PI

12、N_AA21 JP6 Seven Segment Digit Depending on 33 JP6 Seven Segment Digit Depending on 34 JP6 Seven Segment Digit Depending on 35 JP6 Seven Segment Digit Depending on 36 JP6 Seven Segment Digit Depending on 40 JP6 Seven Segment Digit Depending on 41 JP6 Seven Segment Digit Depending on 42 JP6 Seven Seg

13、ment Digit Depending on 43 JP6 Seven Segment Digit Depending on 44 JP6 Seven Segment Digit Depending on 45 JP6 Seven Segment Digit Depending on 46 JP6 Seven Segment Digit Depending on 50 JP6 Seven Segment Digit Depending on 51 JP6 Seven Segment Digit Depending on 52 JP6 Seven Segment Digit Depending

14、 on HEX34 PIN_AD24 HEX35 PIN_AF23 HEX36 PIN_Y19 HEX40 PIN_AB19 HEX41 PIN_AA19 HEX42 PIN_AG21 HEX43 PIN_AH21 HEX44 PIN_AE19 HEX45 PIN_AF19 HEX46 PIN_AE18 HEX50 PIN_AD18 HEX51 PIN_AC18 HEX52 PIN_AB18 HEX53 PIN_AH19 53 HEX54 PIN_AG19 JP6 Seven Segment Digit Depending on 54 JP6 Seven Segment Digit Depen

15、ding on 55 JP6 Seven Segment Digit Depending on 56 JP6 Seven Segment Digit Depending on 60 JP6 Seven Segment Digit Depending on 61 JP6 Seven Segment Digit Depending on 62 JP6 Seven Segment Digit Depending on 63 JP6 Seven Segment Digit Depending on 64 JP6 Seven Segment Digit Depending on 65 JP6 Seven

16、 Segment Digit Depending on 66 JP6 Seven Segment Digit Depending on 70 JP6 Seven Segment Digit Depending on 71 JP6 Seven Segment Digit Depending on 72 JP6 Seven Segment Digit Depending on 73 JP6 Seven Segment Digit Depending on HEX55 PIN_AF18 HEX56 PIN_AH18 HEX60 PIN_AA17 HEX61 PIN_AB16 HEX62 PIN_AA

17、16 HEX63 PIN_AB17 HEX64 PIN_AB15 HEX65 PIN_AA15 HEX66 PIN_AC17 HEX70 PIN_AD17 HEX71 PIN_AE17 HEX72 PIN_AG17 HEX73 PIN_AH17 HEX74 PIN_AF17 74 HEX75 PIN_AG18 JP6 Seven Segment Digit Depending on 75 JP6 Seven Segment Digit 3.3V 76 HEX76 PIN_AA14 表 5 时钟信号引脚配置信息 Signal Name FPGA Pin No. CLOCK_50 CLOCK2_5

18、0 CLOCK3_50 PIN_Y2 PIN_AG14 PIN_AG15 Description I/O Standard 50 MHz clock input 50 MHz clock input 50 MHz clock input 3.3V 3.3V Depending on JP6 Depending on JP6 3.3V SMA_CLKOUT PIN_AE23 External (SMA) clock output External (SMA) clock input SMA_CLKIN PIN_AH14 表 6 LCD 模块引脚配置 Signal Name FPGAPinNo.

19、Description LCD_DATA7 PIN_M5 LCD_DATA6 PIN_M3 LCD_DATA5 PIN_K2 LCD_DATA4 PIN_K1 LCD_DATA3 PIN_K7 LCD_DATA2 PIN_L2 LCD_DATA1 PIN_L1 LCD_DATA0 PIN_L3 LCD Data7 LCD Data6 LCD Data5 LCD Data4 LCD Data3 LCD Data2 LCD Data1 LCD Data0 I/O Standard 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V LCD_EN LCD_RW PIN_L4 PIN

20、_M1 LCD Enable 3.3V LCD Read/Write Select, 0 = Write, 1 = 3.3V Read LCD Command/Data Select, 0 = Command, 1 = Data LCD Power ON/OFF LCD Back Light ON/OFF 3.3V LCD_RS PIN_M2 LCD_ON LCD_BLON PIN_L5 PIN_L6 3.3V 3.3V 表 7 HSMC 接口引脚配置 Signal Name FPGA Pin No. PIN_AH15 Description I/O Standard HSMC_CLKIN0

21、Dedicated clock input Depending on JP6 HSMC_CLKIN_N1 PIN_J28 LVDS RX or CMOS I/O or Depending on differential clock input JP7 LVDS RX or CMOS I/O or Depending on differential clock input JP7 LVDS RX or CMOS I/O or Depending on differential clock input JP7 LVDS RX or CMOS I/O or Depending on differen

22、tial clock input JP7 Dedicated clock output Depending on JP7 HSMC_CLKIN_N2 PIN_Y28 HSMC_CLKIN_P1 PIN_J27 HSMC_CLKIN_P2 PIN_Y27 HSMC_CLKOUT0 PIN_AD28 HSMC_CLKOUT_N1 PIN_G24 LVDS TX or CMOS I/O or Depending on differential clock JP7 input/output LVDS TX or CMOS I/O or Depending on differential clock J

23、P7 input/output LVDS TX or CMOS I/O or Depending on differential clock JP7 HSMC_CLKOUT_N2 PIN_V24 HSMC_CLKOUT_P1 PIN_G23 input/output HSMC_CLKOUT_P2 PIN_V23 LVDS TX or CMOS I/O or Depending on differential clock JP7 input/output LVDS TX or CMOS I/O Depending on JP7 Depending on JP7 Depending on JP7

24、Depending on JP7 HSMC_D0 PIN_AE26 HSMC_D1 PIN_AE28 LVDS TX or CMOS I/O HSMC_D2 PIN_AE27 LVDS TX or CMOS I/O HSMC_D3 PIN_AF27 LVDS TX or CMOS I/O HSMC_RX_D_N0 PIN_F25 LVDS RX bit 0n or CMOS Depending on I/O JP7 LVDS RX bit 1n or CMOS Depending on I/O JP7 LVDS RX bit 2n or CMOS Depending on I/O JP7 LV

25、DS RX bit 3n or CMOS Depending on I/O JP7 LVDS RX bit 4n or CMOS Depending on I/O JP7 LVDS RX bit 5n or CMOS Depending on I/O JP7 LVDS RX bit 6n or CMOS Depending on I/O JP7 LVDS RX bit 7n or CMOS Depending on I/O JP7 LVDS RX bit 8n or CMOS Depending on I/O JP7 HSMC_RX_D_N1 PIN_C27 HSMC_RX_D_N2 PIN_

26、E26 HSMC_RX_D_N3 PIN_G26 HSMC_RX_D_N4 PIN_H26 HSMC_RX_D_N5 PIN_K26 HSMC_RX_D_N6 PIN_L24 HSMC_RX_D_N7 PIN_M26 HSMC_RX_D_N8 PIN_R26 HSMC_RX_D_N9 PIN_T26 LVDS RX bit 9n or CMOS Depending on I/O JP7 LVDS RX bit 10n or CMOS Depending on I/O JP7 LVDS RX bit 11n or CMOS Depending on I/O JP7 LVDS RX bit 12n

27、 or CMOS Depending on I/O JP7 LVDS RX bit 13n or CMOS Depending on I/O JP7 LVDS RX bit 14n or CMOS Depending on I/O JP7 LVDS RX bit 15n or CMOS Depending on I/O JP7 LVDS RX bit 16n or CMOS Depending on I/O JP7 LVDS RX bit 0 or CMOS I/O LVDS RX bit 1 or CMOS I/O LVDS RX bit 2 or CMOS I/O LVDS RX bit

28、3 or CMOS I/O LVDS RX bit 4 or CMOS I/O LVDS RX bit 5 or CMOS I/O LVDS RX bit 6 or CMOS I/O Depending on JP7 Depending on JP7 Depending on JP7 Depending on JP7 Depending on JP7 Depending on JP7 Depending on JP7 HSMC_RX_D_N10 PIN_U26 HSMC_RX_D_N11 PIN_L22 HSMC_RX_D_N12 PIN_N26 HSMC_RX_D_N13 PIN_P26 H

29、SMC_RX_D_N14 PIN_R21 HSMC_RX_D_N15 PIN_R23 HSMC_RX_D_N16 PIN_T22 HSMC_RX_D_P0 PIN_F24 HSMC_RX_D_P1 PIN_D26 HSMC_RX_D_P2 PIN_F26 HSMC_RX_D_P3 PIN_G25 HSMC_RX_D_P4 PIN_H25 HSMC_RX_D_P5 PIN_K25 HSMC_RX_D_P6 PIN_L23 HSMC_RX_D_P7 PIN_M25 LVDS RX bit 7 or CMOS I/O LVDS RX bit 8 or CMOS I/O LVDS RX bit 9 o

30、r CMOS I/O Depending on JP7 Depending on JP7 Depending on JP7 HSMC_RX_D_P8 PIN_R25 HSMC_RX_D_P9 PIN_T25 HSMC_RX_D_P10 PIN_U25 LVDS RX bit 10 or CMOS Depending on I/O JP7 LVDS RX bit 11 or CMOS Depending on I/O JP7 LVDS RX bit 12 or CMOS Depending on I/O JP7 LVDS RX bit 13 or CMOS Depending on I/O JP

31、7 LVDS RX bit 14 or CMOS Depending on I/O JP7 LVDS RX bit 15 or CMOS Depending on I/O JP7 LVDS RX bit 16 or CMOS Depending on I/O JP7 LVDS TX bit 0n or CMOS Depending on I/O JP7 LVDS TX bit 1n or CMOS Depending on I/O JP7 LVDS TX bit 2n or CMOS Depending on I/O JP7 LVDS TX bit 3n or CMOS Depending o

32、n I/O JP7 LVDS TX bit 4n or CMOS Depending on I/O JP7 HSMC_RX_D_P11 PIN_L21 HSMC_RX_D_P12 PIN_N25 HSMC_RX_D_P13 PIN_P25 HSMC_RX_D_P14 PIN_P21 HSMC_RX_D_P15 PIN_R22 HSMC_RX_D_P16 PIN_T21 HSMC_TX_D_N0 PIN_D28 HSMC_TX_D_N1 PIN_E28 HSMC_TX_D_N2 PIN_F28 HSMC_TX_D_N3 PIN_G28 HSMC_TX_D_N4 PIN_K28 HSMC_TX_D

33、_N5 PIN_M28 LVDS TX bit 5n or CMOS Depending on I/O JP7 LVDS TX bit 6n or CMOS Depending on I/O JP7 LVDS TX bit 7n or CMOS Depending on I/O JP7 LVDS TX bit 8n or CMOS Depending on I/O JP7 LVDS TX bit 9n or CMOS Depending on I/O JP7 LVDS TX bit 10n or CMOS Depending on I/O JP7 LVDS TX bit 11n or CMOS

34、 Depending on I/O JP7 LVDS TX bit 12n or CMOS Depending on I/O JP7 LVDS TX bit 13n or CMOS Depending on I/O JP7 LVDS TX bit 14n or CMOS Depending on I/O JP7 LVDS TX bit 15n or CMOS Depending on I/O JP7 LVDS TX bit 16n or CMOS Depending on I/O JP7 LVDS TX bit 0 or CMOS I/O LVDS TX bit 1 or CMOS I/O L

35、VDS TX bit 2 or CMOS I/O Depending on JP7 Depending on JP7 Depending on JP7 HSMC_TX_D_N6 PIN_K22 HSMC_TX_D_N7 PIN_H24 HSMC_TX_D_N8 PIN_J24 HSMC_TX_D_N9 PIN_P28 HSMC_TX_D_N10 PIN_J26 HSMC_TX_D_N11 PIN_L28 HSMC_TX_D_N12 PIN_V26 HSMC_TX_D_N13 PIN_R28 HSMC_TX_D_N14 PIN_U28 HSMC_TX_D_N15 PIN_V28 HSMC_TX_

36、D_N16 PIN_V22 HSMC_TX_D_P0 PIN_D27 HSMC_TX_D_P1 PIN_E27 HSMC_TX_D_P2 PIN_F27 HSMC_TX_D_P3 PIN_G27 LVDS TX bit 3 or CMOS I/O LVDS TX bit 4 or CMOS I/O LVDS TX bit 5 or CMOS I/O LVDS TX bit 6 or CMOS I/O LVDS TX bit 7 or CMOS I/O LVDS TX bit 8 or CMOS I/O LVDS TX bit 9 or CMOS I/O Depending on JP7 Dep

37、ending on JP7 Depending on JP7 Depending on JP7 Depending on JP7 Depending on JP7 Depending on JP7 HSMC_TX_D_P4 PIN_K27 HSMC_TX_D_P5 PIN_M27 HSMC_TX_D_P6 PIN_K21 HSMC_TX_D_P7 PIN_H23 HSMC_TX_D_P8 PIN_J23 HSMC_TX_D_P9 PIN_P27 HSMC_TX_D_P10 PIN_J25 LVDS TX bit 10 or CMOS Depending on I/O JP7 LVDS TX b

38、it 11 or CMOS Depending on I/O JP7 LVDS TX bit 12 or CMOS Depending on I/O JP7 LVDS TX bit 13 or CMOS Depending on I/O JP7 LVDS TX bit 14 or CMOS Depending on I/O JP7 LVDS TX bit 15 or CMOS Depending on I/O JP7 LVDS TX bit 16 or CMOS Depending on I/O JP7 HSMC_TX_D_P11 PIN_L27 HSMC_TX_D_P12 PIN_V25 H

39、SMC_TX_D_P13 PIN_R27 HSMC_TX_D_P14 PIN_U27 HSMC_TX_D_P15 PIN_V27 HSMC_TX_D_P16 PIN_U22 表 8 GPIO 引脚配置信息 Signal FPGA Pin No. Description I/O Standard Name GPIO0 PIN_AB22 GPIO Connection DATA0 GPIO Connection DATA1 GPIO Connection DATA2 GPIO Connection DATA3 GPIO Connection DATA4 GPIO Connection DATA5

40、GPIO Connection DATA6 GPIO Connection DATA7 GPIO Connection DATA8 GPIO Connection DATA9 GPIO Connection DATA10 GPIO Connection DATA11 GPIO Connection DATA12 GPIO Connection DATA13 GPIO Connection Depending on JP6 Depending on JP6 Depending on JP6 Depending on JP6 Depending on JP6 Depending on JP6 De

41、pending on JP6 Depending on JP6 Depending on JP6 Depending on JP6 Depending on JP6 Depending on JP6 Depending on JP6 Depending on JP6 Depending on GPIO1 PIN_AC15 GPIO2 PIN_AB21 GPIO3 PIN_Y17 GPIO4 PIN_AC21 GPIO5 PIN_Y16 GPIO6 PIN_AD21 GPIO7 PIN_AE16 GPIO8 PIN_AD15 GPIO9 PIN_AE15 GPIO10 PIN_AC19 GPIO

42、11 PIN_AF16 GPIO12 PIN_AD19 GPIO13 PIN_AF15 GPIO14 PIN_AF24 DATA14 GPIO15 PIN_AE21 GPIO Connection DATA15 GPIO Connection DATA16 GPIO Connection DATA17 GPIO Connection DATA18 GPIO Connection DATA19 GPIO Connection DATA20 GPIO Connection DATA21 GPIO Connection DATA22 GPIO Connection DATA23 GPIO Conne

43、ction DATA24 GPIO Connection DATA25 GPIO Connection DATA26 GPIO Connection DATA27 GPIO Connection DATA28 GPIO Connection JP6 Depending on JP6 Depending on JP6 Depending on JP6 Depending on JP6 Depending on JP6 Depending on JP6 Depending on JP6 Depending on JP6 Depending on JP6 Depending on JP6 Depen

44、ding on JP6 Depending on JP6 Depending on JP6 Depending on JP6 Depending on GPIO16 PIN_AF25 GPIO17 PIN_AC22 GPIO18 PIN_AE22 GPIO19 PIN_AF21 GPIO20 PIN_AF22 GPIO21 PIN_AD22 GPIO22 PIN_AG25 GPIO23 PIN_AD25 GPIO24 PIN_AH25 GPIO25 PIN_AE25 GPIO26 PIN_AG22 GPIO27 PIN_AE24 GPIO28 PIN_AH22 GPIO29 PIN_AF26 DATA29 GPIO30 PIN_AE20 GPIO Connection DATA30 GPIO Connection DATA31 GPIO Connection DATA32 GPIO Connection DATA33 GPIO Connection DATA34 GPIO Connection DATA