MicronPresentationppt.ppt
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1、,Micron Engineering Clinic,Fall 08 Spring 09,Welcome toMicron Engineering ClinicAnalysis and Optimization of Multi Gb/s Chip-to-Chip Communication,Micron Engineering Clinic,Fall 08 Spring 09,Team Members Documentation Lead Raheem Alhamdani-CE Technical Leads Bryson Kent-EEJordan Kemp-EELucas Loero-E
2、ETeam LeadBen Meakin CE,Micron Engineering Clinic,Fall 08 Spring 09,Introduction and Motivation for Modeling and Verification of Interconnects,Raheem AlhamdaniDocumentation LeadComputer EngineerAlhamdaneng.utah.edu,Micron Engineering Clinic,Fall 08 Spring 09,Introduction,The Sponsor:Manufacturer of
3、DRAM,Flash Memory,and Image Sensor Integrated Circuits,What Have They Asked Us To Do?Design a software application for modeling and verification of chip-to-chip interconnects,Micron Engineering Clinic,Fall 08 Spring 09,Introduction,What is Verification?Proving through tests and formal methods that a
4、 design does what it is intended to do,What are Chip-to-Chip Interconnects?Electrical systems for communication between two integrated circuits,Micron Engineering Clinic,Fall 08 Spring 09,Motivation,BackgroundMemory and I/O Devices Operate Much Slower than CPUAccess to Off-Chip Resources is Expensiv
5、e 300 cycles-Usually Cycles are WastedDemand for Low-Power yet High-Performance-Cant Have Wasted Cycles!Goal:Speed Up Devices and Speed Up Interconnect,Micron Engineering Clinic,Fall 08 Spring 09,As Devices Move Towards Being Smaller,Faster,Lower PowerInterconnects Become Slower,Noisier,and Unreliab
6、leIssues:Inter-Symbol Interference(ISI)Co-Channel InterferenceTiming JitterVoltage Noise,Problem,Conventional Testing Methodologies are not Feasible or Sufficient,Micron Engineering Clinic,Fall 08 Spring 09,Eye Diagram,Voltage,Time,What is an eye diagram?A useful tool for the qualitative analysis of
7、 signal used in digital transmission.,Micron Engineering Clinic,Fall 08 Spring 09,Eye Diagram,Time,Voltage,Voltage,Time,BitsSuperimposed1 Unit Interval(UI),How is it created?,Micron Engineering Clinic,Fall 08 Spring 09,Eye Diagram(Noise),Time,Voltage,Voltage,Time,BitsSuperimposed1 Unit Interval(UI),
8、Bit-stream,Voltage Noise,What Causes Noise?Interference from neighboring wires(Co-Channel Interference)Electromagnetic InterferenceLink resistance,capacitance,and inductance,Micron Engineering Clinic,Fall 08 Spring 09,Eye Diagram(Jitter),Time,Voltage,Voltage,Time,BitsSuperimposed1 Unit Interval(UI),
9、Bit-stream,Jitter,What Causes Jitter?Clock Variation(Skew)Reflection General Timing Uncertainty,Micron Engineering Clinic,Fall 08 Spring 09,Real Eye Diagram,Data Jitter,Clock Jitter,Signal Noise,Vref,Data SignalClock Signal,Vref Noise+ReceiverSensitivity,How to interpret it?,Micron Engineering Clini
10、c,Fall 08 Spring 09,Solution,Our Objective is Not to Solve These Problems Through Better Design,but toProvide Designers with a Tool That Correctly Models and Verifies Interconnects With These Problems,Deliverables:Cross Platform App with Graphical User InterfaceProvide Worst-Case and Statistical Bas
11、ed Link AnalysisSpice CompatibleCorrectly Model Co-Channel Interference and Tx/Rx Jitter,Micron Engineering Clinic,Fall 08 Spring 09,Project DocumentationMeeting minutes,Time-line,Progress Report,Presentations,Proposal and links are all on the teams website:www.eng.utah.edu/alhamdan/Micron/Micron.ht
12、ml,My Roles,Graphical User Interface and Software DevelopmentGUISoftware skeletonPlotting code Code documentation,Micron Engineering Clinic,Fall 08 Spring 09,Teams website,Micron Engineering Clinic,Fall 08 Spring 09,Meeting Minutes,Micron Engineering Clinic,Fall 08 Spring 09,Bibliography,B.K.Casper,
13、M.Haycock,and R.Mooney,“An accurate and efficient analysis method for multi-Gb/s chip-to-chip signaling scheme”,in Digest of Technical Papers from the IEEE Symposium on VLSI Circuits,June 2002,pp.5457.B.K.Casper,G.Balamurugan,J.E.Jaussi,J.Kennedy,M.Mansuri,“Future microprocessor interfaces:Analysis,
14、design and optimization”,in Proceedings of the IEEE Custom Integrated Circuits Conference,Sept.2007,pp.479-486.P.K.Hanumolu,B.K.Casper,R.Mooney,G.Y.Wei,and U.K.Moon,“Jitter in high-speed serial and parallel links”,in Proceedings of the IEEE International Symposium on Circuits and Systems,May 2004,pp
15、.425428.Pavan Kumar Hanumolu,Bryan Casper,Randy Mooney,Gu-Yeon Wei,and Un-Ku Moon,“Analysis of PLL Clock Jitter in High-Speed Serial Links”,in IEEE Transactions on Circuits and Systems,November 2003,pp.879-886,Micron Engineering Clinic,Fall 08 Spring 09,Questions?,Micron Engineering Clinic,Fall 08 S
16、pring 09,Worst Case Verification of High Speed Interconnects,Bryson KentTechnical LeadElectrical EngineerB,Micron Engineering Clinic,Fall 08 Spring 09,Introduction,What is Worst Case analysisWhy is the Worst Case importantHow to calculate the Worst CaseWhat are the resultsConclusion and implementati
17、on,Micron Engineering Clinic,Fall 08 Spring 09,Worst Case Analysis,Summation of all negative effectsGood representation of what can happen if certain conditions ariseVerification of error free transmission Classic analysis of 1 trillion bits(1*1012 bits)*(10-6sec)=over 10 days,Micron Engineering Cli
18、nic,Fall 08 Spring 09,Worst Case Eye Diagram,WC1 WC2 WC3,Voltage Vs one period of timeDistortion sources add to close the eyeFrom the eye diagram we can calculate a system pass fail,Tim Hollis,Micron Senior Project Proposal,Pass/Fail,Micron Engineering Clinic,Fall 08 Spring 09,Inter-Symbol Interfere
19、nce,Inter-Symbol interference is the main source of interferenceData dependent jitter and Co-channel interference add to signal degradation,Tim Hollis,Micron Senior Project Proposal,Micron Engineering Clinic,Fall 08 Spring 09,C(t)=transmitter symbol responseP(t)=impulse response of the channel,Worst
20、-Case Computation,Worst case eye diagram due to Inter-symbol interference,Worst case eye diagram due to Inter-symbol interference and cochannel interference,J.G.Proakis,“Digital Communication”,McGraw-Hill,3rd Ed.,1995.B.K.Casper,M.Haycock,and R.Mooney,“An accurate and efficient analysis method for m
21、ulti-Gb/s chip-to-chip signaling schemes”,in Digest of Technical Papers from the IEEE Symposium on VLSI Circuits,June 2002,pp.5457.,Micron Engineering Clinic,Fall 08 Spring 09,Calculating the eye diagram,Tim Hollis,Micron Senior Project Proposal,Micron Engineering Clinic,Fall 08 Spring 09,Results,Ca
22、lculated performance Vs given performance,Micron Engineering Clinic,Fall 08 Spring 09,Conclusion,Worst case analysis is beneficialComputation is pulse based analysisUser can define and add any distortion as desiredResults of worst case analysis match results of given test case,Micron Engineering Cli
23、nic,Fall 08 Spring 09,Questions?,Micron Engineering Clinic,Fall 08 Spring 09,Statistical Analysis ofElectrical Signaling,Jordan KempTechnical LeadElectrical E,Micron Engineering Clinic,Fall 08 Spring 09,Introduction,How,Why,What,Summary,Micron Engineering Clinic,Fall 08 Spring 09,Introduction,Worst
24、Case Eye good for Pass/Fail Mask,but doesnt give details,Need for probability of error,rather than rigid“Pass/Fail”,Pass/Fail Mask,Micron Engineering Clinic,Fall 08 Spring 09,Use channel impulse response,p(t),and transmitter symbol response,c(t),Introduction,Find PDF(Probability Density Function)&CD
25、F(Cumulative Distribution Function)of the channel output,Micron Engineering Clinic,Fall 08 Spring 09,Introduction,Shows BER of transmitted data given timing uncertainty(data jitter,clock jitter)and voltage uncertainty(VREF,Rx sensitivity,ISI),Plot BER eye-diagram as a function of sample time,sample
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