片机片内外设模块(ATD).ppt

College of Communication Engineering,Jilin University,第10章 单片机片内外设模块,College of Communication Engineering,Jilin University,本章提要,10.1 并行I/O10.2 异步串行通信SCI10.3 同步串行通信SPI10.4 ATD转换模块10.5 周期中断定时器PIT10.6 时钟产生器模块,College of Communication Engineering,Jilin University,本章提要,10.1 并行I/O10.2 异步串行通信SCI10.3 同步串行通信SPI10.4 ATD转换模块10.5 周期中断定时器PIT10.6 时钟产生器模块,College of Communication Engineering,Jilin University,10.4 ATD转换模块,10.4.1 A/D转换基本知识10.4.2 ATD模块简介10.4.3 ATD模块寄存器10.4.4 ATD模块编程范例,College of Communication Engineering,Jilin University,10.4 ATD转换模块,10.4.1 A/D转换基本知识10.4.2 ATD模块简介10.4.3 ATD模块寄存器10.4.4 ATD模块编程范例,College of Communication Engineering,Jilin University,10.4.1 A/D转换基本知识,微控制器处理的是离散量(数字量)，而现实中往往是连续量(模拟量)。物理量如：温度，压力，湿度以及速度等等。传感器将物理量转换为电信号(电压，电流)需要模拟-数字转换器将电信号转换为数字量以供微控制器处理,College of Communication Engineering,Jilin University,10.4.1 A/D转换基本知识,逐次逼近式A/D转换器工作原理（4位为例）,SA-ADC 完成一次转换至少需要 n 个时钟周期,College of Communication Engineering,Jilin University,10.4.1 A/D转换基本知识,采样保持电路 可以避免输入电压在转换期间发生变化而引起的差错。,College of Communication Engineering,Jilin University,10.4.1 A/D转换基本知识,AD参数转换位数（Bits）:分辨率=2-n(8bits=1/256=0.39%)转换速度（Speed）:由工作时钟频率和转换位数确定转换范围（Range）:05V,010V,-5V+5V.Etc.转换通道数（Channels）:8、16,College of Communication Engineering,Jilin University,10.4 ATD转换模块,10.4.1 A/D转换基本知识10.4.2 ATD模块简介10.4.3 ATD模块寄存器10.4.4 ATD模块编程范例,College of Communication Engineering,Jilin University,10.4.2 ATD模块简介,S12单片机ADC特性如下：8/10/12位可选 转换速度较高，8位、8MHz、单次转换时间为2us 采样时间可编程设置 多种转换模式：数据对齐方式、单次/连续转换、转换结果比较 外触发控制 转换序列结束可产生中断，能够使能比较中断 模拟输入引脚与通用I/O口复用 多通道扫描，116 转换序列长度。,College of Communication Engineering,Jilin University,10.4.2 ATD模块简介,S12单片机ADC转换时间：,转换时间计算举例:(假设A/D 时钟为2MHz，10位精度)转换时间=Initial Sample Time+Programmed Sample Time+Resolution Period=2+4+10=16 A/D Clocks=8us,College of Communication Engineering,Jilin University,10.4.2 ATD模块简介,S12单片机ADC模块框图,College of Communication Engineering,Jilin University,10.4 ATD转换模块,10.4.1 A/D转换基本知识10.4.2 ATD模块简介10.4.3 ATD模块寄存器10.4.4 ATD模块编程范例,College of Communication Engineering,Jilin University,10.4.3 ATD模块寄存器,S12单片机ATD模块共27个寄存器控制寄存器（ATDCTL0ATDCTL5，6个）状态寄存器（ATDSTAT0ATDSTAT1，2个）比较使能寄存器（ATDCMPE，1个）比较方式寄存器（ATDCMPHT，1个）转换输入使能寄存器（ATDDIEN，1个）转换结果寄存器（ATDDR0ATDDR15，16个）其中:8位寄存器：ATDCTL0ATDCTL5,ATDSTAT0 16位寄存器：其余,College of Communication Engineering,Jilin University,1、ATD Control Register 0(ATDCTL0)$02C0,10.4.3 ATD模块寄存器,WRAP3-0-Wrap Around Channel Select 0=ReservedX=多通道转换模式 从ANx回绕到AN0 1x 15 仅在ATDCTL5的MULT=1时有效,College of Communication Engineering,Jilin University,2、ATD Control Register 1(ATDCTL1)$02C1,10.4.3 ATD模块寄存器,SRES1:0-A/D Resolution Select,ETRIGSEL-External Trigger Source Select S12XS此位无效,ETRIGCH3:0-External Trigger Channel Select,SMP_DIS-Discharge Before Sampling Bit 0=No discharge 1=discharge,注：写ATDCTL1会终止当前转换序列,College of Communication Engineering,Jilin University,3、ATD Control Register 2(ATDCTL2)$02C2,10.4.3 ATD模块寄存器,注：写ATDCTL2会终止当前转换序列,AFFC-ATD Fast Flag Clear All0=向CCFn 标志位写1则清零1=读ATD转换结果寄存器则CCFn 标志位清零（当比较功能被禁止）写ATD转换结果寄存器则CCFn 标志位清零（当比较功能被使能）,ETRIGE-External Trigger Mode Enable0=禁止外部触发信号1=使能外部触发信号,ASCIE-ATD Sequence Complete Interrupt Enable0=禁止ATD转换序列结束中断1=使能ATD转换序列结束中断,ACMPIE-ATD Compare Interrupt Enable0=禁止比较中断1=使能比较中断,ICLKSTP-Internal Clock in Stop Mode Bit0=停止模式下，停止当前转换，退出停止模式后 ATD转换自动重新开始1=停止模式下，可继续使用内部时钟进行ATD转换,ETRIGLE-外部信号触发条件选择位ETRIGP-外部信号极性,College of Communication Engineering,Jilin University,4、ATD Control Register 3(ATDCTL3)$02C3,10.4.3 ATD模块寄存器,注：写ATDCTL3会终止当前转换序列,College of Communication Engineering,Jilin University,5、ATD Control Register 4(ATDCTL4)$02C4,10.4.3 ATD模块寄存器,注：写ATDCTL4会终止当前转换序列,采样时间长，采样点电平更准确的逼近外部信号电平,College of Communication Engineering,Jilin University,6、ATD Control Register 5(ATDCTL5)$02C5,10.4.3 ATD模块寄存器,ATD启动：写ATDCTL5会终止当前转换序列，并开始新一次转换 此后，若外部触发信号每次满足触发条件都会开始一次ATD转换,SC-Special Channel Conversion0=Special channel conversions disabled1=Special channel conversions enabled,SCAN-Continuous Conversion Sequence Mode 0=Single conversion sequence1=Continuous conversion sequences(scan mode),MULT-Multi-Channel Sample 0=Sample only one channel1=Sample across several channels,CD,CC,CB,CA-Analog Input Channel Select Code,College of Communication Engineering,Jilin University,10.4.3 ATD模块寄存器,单通道，单次转换多通道，单次转换单通道，序列转换模式多通道，序列转换模式特殊通道测试模式,ATD模块工作方式,College of Communication Engineering,Jilin University,7、ATD Status Register 0(ATDSTAT0)$02C6,10.4.3 ATD模块寄存器,SCF-Sequence Complete Flag0=一次转换序列未完成1=一次转换序列完成,ETORF-External Trigger Overrun Flag0=No External trigger over run error has occurred1=External trigger over run error has occurred,FIFOR-Result Register Overrun Flag0=No over run has occurred1=Overrun condition exists(result register has been written while associated CCFx flag was still set),CC3:0-Conversion Counter当前转换结果将写入的结果寄存器编号 例如：CC3:0=0110，转换结果写入第6个结果寄存器先入先出模式下，不被初始化，当计数到最大值回最小值非先入先出模式下，转换开始和结束时被初始化为0两种模式下终止ATD转换或开始新ATD转换均被清零,College of Communication Engineering,Jilin University,8、ATD Compare Enable Register(ATDCMPE)$02C8,10.4.3 ATD模块寄存器,CMPE15:0-Compare Enable for Conversion Number n(n=15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0)of a Sequence0=No automatic compare1=Automatic compare of results for conversion n of a sequence is enabled,对一个序列中第n次ATD转换结果进行比较，除CMPEn=1，还要完成如下设置：将比较阈值写入ATDDRn写ATDCPMHT的CMPHTn位选择比较方法,注：写ATDCMPE会终止当前转换序列,College of Communication Engineering,Jilin University,9、ATD Status Register 2(ATDSTAT2)$02CA,10.4.3 ATD模块寄存器,CCF15:0-Conversion Complete Flag n(n=15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0)0=Conversion number n not completed or successfully compared1=If(CMPEn=0):Conversion number n has completed.Result is ready in ATDDRn.If(CMPEn=1):Compare for conversion result number n with compare value in ATDDRn,using compare operator CMPGTn is true.(No result available in ATDDRn),出现以下任一情况，CCFn被清零：写ATDCTL5当AFFC=0，向CCFn写1当AFFC=1，且CMPEn=0，读ATDDRn当AFFC=1，且CMPEn=1，写ATDDRn,College of Communication Engineering,Jilin University,10、ATD Input Enable Register(ATDDIEN)$02CC,10.4.3 ATD模块寄存器,IEN15:0-ATD Digital Input Enable on channel x(x=15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0)0=Disable digital input buffer to ANx pin1=Enable digital input buffer on ANx pin,通用I/O口AD口与ATD模块的模拟输入引脚复用将某个模拟输入引脚作为通用输入引脚使用时，必须将对应IEN位置位,College of Communication Engineering,Jilin University,11、ATD Compare Higher Than Register(ATDCMPHT)$02CE,10.4.3 ATD模块寄存器,CMPHT15:0-Compare Operation Higher Than Enable for conversion number n(n=15,14,2,1,0)of a Sequence0=If result of conversion n is lower or same than compare value in ATDDRn,this is flagged in ATDSTAT21=If result of conversion n is higher than compare value in ATDDRn,this is flagged in ATDSTAT2,注：写ATDCMPHT会终止当前转换序列,College of Communication Engineering,Jilin University,1227、ATD Conversion Result Registers(ATDDRn),10.4.3 ATD模块寄存器,ATDDR0ATDDR15$02D0$02EE,关闭比较操作时，ATD转换结果写入ATDDRn,要写入的ATDDRn的编号由ATDSTAT0的CC3CC0转换计数给出,转换结果在ATDDRn中的放置位置与转换精度和结果对齐方式有关,使能比较功能时，ATD转换结果和比较阈值都总是12位，与SRES1:0(ATDCTL1)无关,DJM=0 比较阈值左对齐,DJM=1 比较阈值右对齐,转换结果不放入结果寄存器，比较完成后丢失,College of Communication Engineering,Jilin University,10.4 ATD转换模块,10.4.1 A/D转换基本知识10.4.2 ATD模块简介10.4.3 ATD模块寄存器10.4.4 ATD模块编程范例,College of Communication Engineering,Jilin University,10.4.4 ATD模块编程范例,ATD模块编程需要考虑的问题：启动转换：写ATD0CTL5将启动转换；若使用外部触发，则需设定触发通道，触发条件，使能外部触发转换进行：设定AD时钟，采样时间，转换位数，8/10/12位可选转换通道是否为特殊通道；转换序列是否为单通道；是否为连续转换是否为比较功能，如是，则需要使能比较通道，写比较阈值，选择比较方式转换结束：读SCF判断转换序列是否完成；或查CCF15:0逐个通道判断；或采用中断方式设置AFFC，CCF是否快速清零结果数据存储的寄存器设置FIFO读结果数据寄存器比较方式下，比较结果存于CCF15:0，也可以使能比较中断,College of Communication Engineering,Jilin University,10.4.4 ATD模块编程范例,ATD模块编程方法ATD初始化：先写除ATD0CTL5外的控制寄存器写ATD0CTL5完成初始化，并启动转换；ATD结果读取：通过查询ATD0STAT0中的SCF位（某通道的CCF位）或采用中断方式，确定转换完成，读取相关结果寄存器取得ATD转换结果。8/10/12位可选,College of Communication Engineering,Jilin University,10.4.4 ATD模块编程范例,ATD应用实例（P266 实验8）1、任务：(1)将一路模拟电平转换成数字量，并将转换结果显示LED灯上。(2)实现连续的单通道AD转换与结果显示，调节可调电阻，可以看到 转换结果的连续变化。当结果满足某个条件时，B口小灯闪烁，条件不满足时，小灯恢复常态。(3)实现多路AD转换和结果显示，如按1时显示通道n，按2显示通道 n+1。(4)接续(3),采用中断方式和外部触发条件使用AD,College of Communication Engineering,Jilin University,10.4.4 ATD模块编程范例,ATD应用实例（P266 实验8）2、硬件电路：,AD模拟电平产生电路与AD管脚的连接,College of Communication Engineering,Jilin University,10.4.4 ATD模块编程范例,ATD应用实例（P266 实验8）3、软件编程：（1）AD初始化,void ATD_init(void)ATD0CTL1=0 x0F;/选择8位转换精度ATD0CTL2=0 x40;/打开CCF快速清零，关闭外部触发输入，关闭中断ATD0CTL3=0 x08;/数据左对齐，non-fifo，转换序列长度为1ATD0CTL4=0 xE3;/采样时间为24个ATD时钟周期，ATDClk=8MB/8=1MHz,College of Communication Engineering,Jilin University,10.4.4 ATD模块编程范例,（2）单次、单通道,void ATD_init(void)for(;)ATD0CTL5=0 x0F;/单次转换，单通道，选择通道15/ATD0CTL5=0 x46;/单次转换，单通道，选择特殊通道(VRL+VRH)/2 while(!(ATD0STAT0/显示,College of Communication Engineering,Jilin University,10.4.4 ATD模块编程范例,（3）连续、单通道,ATD0CTL5=0 x2F;/连续转换，单通道，选择通道15 for(;)/*ATD0CTL5=0 x0F;*/单次转换，单通道，选择通道15 while(!(ATD0STAT0/显示,College of Communication Engineering,Jilin University,10.4.4 ATD模块编程范例,（4）连续、多通道,ATD0CTL3=0 x10;/数据左对齐，non-fifo，转换序列长度为2 ATD0CTL5=0 x3E;/连续转换，2通道，选择通道14、15 ATD0CTL5=0 x2F;/连续转换，单通道，选择通道15 for(;)/*ATD0CTL5=0 x0F;*/单次转换，单通道，选择通道15 while(!(ATD0STAT0/显示,College of Communication Engineering,Jilin University,10.4.4 ATD模块编程范例,（5）外部触发，中断使能，连续转换，多通道,ATD0CTL1=0 x06;/选择8位转换精度,6通道模拟外部触发 ATD0CTL2=0 x56;/打开CCF快速清零，使能外部触发输入，低电平触发，打开中断 ATD0CTL3=0 x10;/数据左对齐，non-fifo，转换序列长度为2 ATD0CTL5=0 x3E;/连续转换，2通道，选择通道14、15 for(;)Show();/显示 void interrupt 22 ADINT(void)ADresult=ATD0DR0H;showdata0=ADresult,