MentorSystemCverification.ppt

SystemC Support in ModelSim,1,Advanced Functional Verification using SystemCPresented By:Raghu ArdeisharTechnical Marketing EngineerDesign Verification and Test,ModelSim,SystemC Support in ModelSim,2,Technology OverviewBasic SystemCSCV(SystemC Verification Library)SystemC Support in ModelSimDemo,Agenda,SystemC Support in ModelSim,3,What Is SystemC?,High Level Hardware Verification LanguageModels Designs at High Level of Abstraction(Algorithmic)Designs Modeled in Untimed Manner for Fast ExecutionIdeal for Proof of Concept&Architectural ExplorationBased on C+Matured Language,Well Known to Systems DesignersNaturally Interface with Existing C+ModelsStandard C+Development Tools SupportedC+Class Library to Enable System Level&Hardware ModelingConcurrency,Data Types,Timed Events,Interfaces,etc.Modules,Processes,Communications through Ports&Signals,etc.,SystemC Support in ModelSim,4,Technology OverviewBasic SystemCSCVSystemC Support in ModelSimDemo,Agenda,SystemC Support in ModelSim,5,Modules,Interfaces,Ports,Channels,Processes,Events,A SystemC“System”,Port,Interface,Event,Channel,Module Instance,Module Instance,Process,Process,Process,Module,SystemC Support in ModelSim,6,Used to Partition DesignsMay ContainPortsProcessesInternal Data&ChannelsOther Modules(Hierarchical)Constructor(to Create&Initialize Module)Module-Module Communication via ChannelsModule-Process Communication via Channels,Modules,SC_MODULE(Adder)/ports,processes,internal data,etc.SC_CTOR(Adder)/body of constructor/process declaration,sensitivities,etc.;,SC_MODULE(Adder).;is a SystemC macro forclass Adder:public sc_module.;,SystemC Support in ModelSim,7,Define Set of Methods(Functions)Method Signatures OnlyNot Implementation of MethodsChannels Implement InterfacesDifferent Implementation for Same Interface PossibleDerived from SystemC Base Class sc_interfaceBuilt-In Interface Examples:sc_signal_in_if,sc_fifo_in_if,etc.,Interfaces,class simple_rw_if:public sc_interface public:void read(unsigned addr,char*data);void write(unsigned addr,char*data);,SystemC Support in ModelSim,8,Used by Modules to Communicate with SurroundingsAccess Channels through InterfacesWhat a port can do(read,write,etc.)is restricted to the methods defined in the associated interface(s)Ports can only be used with Channels that implement the associated interfacesDerived from SystemC Base Class sc_portUsage:sc_port port_name;,Ports,sc_in a;is a short-hand forsc_port a;a is an input port of type int that can access methods defined in sc_signal_in_if.,SC_MODULE(Adder)sc_in a;sc_in b;sc_out c;/processes,etc.SC_CTOR(Adder)/body of constructor/process declaration,sensitivities,etc.;,SystemC Support in ModelSim,9,Used to Store Ports are bound to Channels through Interfaces,Channels,SystemC Support in ModelSim,10,Interfaces,Ports,Channels,Port a,Interface a_if,method_c()method_d(),method_c()Implementationmethod_d()Implementation,Port b,Interface b_if,method_e()method_f(),method_e()Implementationmethod_f()Implementation,Module,Port,Interface,Channel,Channel channel_a,Channel channel_b,a-method_c()Legala-method_f()Illegal,SystemC Support in ModelSim,11,Functions to Describe Module Functionality ConcurrentlyNot HierarchicalConstructor Used to Register Member Functions as SystemC Processes(SC_METHOD,SC_THREAD)Invoked Based on Static&Dynamic SensitivityProcess-Process Communication via Channels&Events,Processes,SC_MODULE(Adder)sc_in a;sc_in b;sc_out c;void compute()c=a+b;SC_CTOR(Adder)SC_METHOD(compute);sensitive a b;,SystemC Support in ModelSim,12,Always Execute Function Body from Start to EndNo Suspension(No wait()inside SC_METHODSupport Static SensitivityExecute When Signals on Sensitivity List ChangeExample:sensitive a b;Support Dynamic Sensitivity with next_trigger()Execution continues to the end&return control back to the kernelNext time the method process will be invoked only when the event specified by next_trigger()occursUntil such event occurs,the static sensitivity list is temporarily disabled,Method Processes(SC_METHOD),next_trigger(e1);next_trigger(e1|e2);next_trigger(e1,SystemC Support in ModelSim,13,May Suspend Execution with wait()Statements are executed until wait()is encounteredAt wait(),process execution is suspended until an event it is sensitive to occursContinue to execute from where it was suspendedSupport Static SensitivityExecute When Signals on Sensitivity List ChangeExample:sensitive a b;Support Dynamic Sensitivity with wait(),Thread Processes(SC_THREAD),wait(e1);wait(e1|e2);wait(e1,SC_MODULE(Adder)sc_in a;sc_in b;sc_out c;void compute()while(1)wait(100,SC_PS);c=a+b;SC_CTOR(Adder)SC_THREAD(compute);sensitive a b;,SystemC Support in ModelSim,14,Basic Synchronization Objects of Class sc_eventUsed to Synchronize causes e1 to be made immediately ready to run,Events,SystemC Support in ModelSim,15,Immediate NotificationCauses processes which are sensitive to the event to be made immediately ready to runExample:e1.notify();/current delta cycleDelayed NotificationCauses processes which are sensitive to the event to be made immediately ready to run in the next evaluation phase(a delta cycle later)Example:e1.notify(SC_ZERO_TIME);/next delta cycleTimed NotificationCauses processes which are sensitive to the event to be made immediately ready to run at a specified time in the futureExample:e1.notify(10,SC_NS);/10ns delay,Events,SystemC Support in ModelSim,16,Turn off Process ImitializationUse dont_initialize()after its SC_METHOD or SC_THREAD declaration inside the constructorGenerate Clock SignalsE.g:sc_clock clk(clk,10,SC_NS,0.2,5,SC_NS,false);Default Period=1ns,Duty Cycle=50%,Initial Value=TrueStart SimulationOSCI Uses sc_start(10,SC_PS);Use run Command in ModelSimStop SimulationExample:sc_stop();,Simulation Control,SystemC Support in ModelSim,17,Supported Formats:VCD(Value Change Dump)WIF(Waveform Interchange Format)ISDB(Integrated Signal Data Base)Step 1:Create Trace FileSyntax:sc_trace_file*=sc_create_trace_file();Step 2:Specify Signals to SaveSyntax:sc_trace(,);Step 3:Close FileVCD:sc_close_vcd_trace_file();WIF:sc_close_wif_trace_file();ISDB:sc_close_isdb_trace_file();,Waveform Export,sc_trace_file*tf=sc_create_vcd_trace_file(myvcd);sc_trace(tf,clock,clock);sc_trace(tf,reset,reset);sc_close_vcd_trace_file(tf);,SystemC Support in ModelSim,18,Technology OverviewBasic SystemCTestBench AutomationSCV(SystemC Verification Library)SystemC Support in ModelSimDemo,Agenda,SystemC Support in ModelSim,19,Scaffolding around the designAll the stuff you need to build and verify a designSoftwareProgramming-centric view of the intentSpecified in the verification planCan cost as much or more than the design itselfEfficiency,Reuse,etc are important,TBA is All About Infrastructure,Verification Engineers,SystemC Support in ModelSim,20,Building Infrastructures,Collections of verification componentsComponents that participate in the simulation,but are not part of the designBuild reusable modular componentsto the extent possible,SystemC Support in ModelSim,21,Building a Testbench,DUT,Scoreboard,Test,Basics,Intent is captured in test and scoreboard,SystemC Support in ModelSim,22,Generate more efficient verification reduce time per testObject-Oriented ProgrammingObjects,Abstraction,Encapsulation,Inheritance,etc.Reusable test componentsAutomated stimulus generationConstrained sequence,control and data randomization.Test bench infrastructureSampling of stable test valuesClean interface between SystemC and HDL,SystemC Testbench Automation,SystemC Support in ModelSim,23,Classes,Encapsulate model behaviourProperties hold data valuesMethods implement processingReusable test componentsExtensibleProvide an object-oriented inheritance paradigm,class ether_packetpublic:sc_uint preamble;sc_uint sfd;sc_uint dest;sc_uint src;sc_uint len;,SystemC Support in ModelSim,24,Stimulus Generation Methodologies,Random,Verifies specific scenarios Other scenarios left untestedLabor expensiveImpossible to cover the verification space,Broader coverageEasy to write testsNot deep sequences required to penetrateNot efficientredundant tests,Broad and deepEasy to writeTests are more productiveLet the tool find unforeseen corner casesDirected tests is a highly constrained random test,SystemC Support in ModelSim,25,Constrained Random Saves Time,SystemC Support in ModelSim,26,SystemC Testbench Automation using SystemC Verification Library(SCV),C+Class LibraryStimulus Generators,Monitors,Checkers,Transactors.Modeling&Verification with Function CallsHigh Level of AbstractionIntelligent Test Bench GenerationData IntrospectionConstrained&Weighted RandomizationTransaction Monitoring&RecordingCall-Back Mechanism to Notify Test Bench Certain Transactions OccurredSystem Level Test Bench Reused to Verify RTLEnables Test Bench Creation&Automation,SystemC Support in ModelSim,27,SystemC Verification Library(SCV),SCV adds additional capabilities to SystemC for developing testbenchesData IntrospectionTransaction RecordingCallbacksRandomization of DataWeighted,Directed randomizations using ConstraintsConnection to STL(C+standard template library),SystemC Support in ModelSim,28,Data Introspection,The SystemC Verification Standard uses a technique called data introspection to enable the manipulation of arbitrary data types.It allows a library routine to extract information from data objects of arbitrary data types,regardless of whether it is a C/C+built-in type,a SystemC built-in type,a user-specified composite type(struct),or a user-specified enumeration.Introspection API is categorized into the following parts:utilBasic utility methodsrwMethods to read and write to data object,its fields,its array elementstypeMethods to extract type informationrandMethods for randomization-related operationscallbackMethods for callback registration,SystemC Support in ModelSim,29,Simple and Complex Data Randomization,Class used in all components:scv_extensions_ifNormal C+,SystemC data types(int,float,double etc)needs a wrapper class which provides the methods.,scv_smart_ptr-type is int,float,double etcscv_smart_ptr num1(“num1”);scv_smart_ptr num2(“num2”);num1-next();-randomizes num1cout get_name()*num1*num1 endl;,SystemC Support in ModelSim,30,Introspection for Simple Types,For Simple types eg,int,float as shown below you inherit from scv_constraint_base to randomize data.,class men_constr public:,scv_smart_ptr,scv_smart_ptr,SCV_CONSTRAINT_CTOR(men_constr)SCV_CONSTRAINT(num1()=1,:public scv_constraint_base,Use SCV_CONSTRAINT_CTOR macro and bind each element with SCV_CONSTRAINT macro.,int num1;float num2;,;,SystemC Support in ModelSim,31,Simple Types,#include systemc.h#include scv.hclass men_constr:public scv_constraint_base public:scv_smart_ptr num1;scv_smart_ptr num2;SCV_CONSTRAINT_CTOR(men_constr)SCV_CONSTRAINT(num1()=1,void mytop:randomis()for(int i=0;i 10;i+)a.next();cout*a.num1*a.num2 endl;SC_MODULE_EXPORT(mytop);,SystemC Support in ModelSim,32,Introspection for User Defined Types,For User defined types eg,structs,classes a template needs to be provided based on the scv_extensions class.,class my_pkt public:int num1;float num2;,struct my_pkt int num1;float num2;,OR,name of the class or structelements in the class,SystemC Support in ModelSim,33,Introspection for User Defined Types,For User defined types eg,structs,classes a template needs to be provided based on the scv_extensions class.,class public:,template,scv_extensions,scv_extensions,scv_extensions,SCV_EXTENSIONS_CTOR(my_pkt)SCV_FIELD(num1);SCV_FIELD(num2);,:public scv_extensions_base,Use SCV_EXTENSIONS_CTOR macro and wrap each element with SCV_FIELD macro.,my_pkt,int num1;float num2;,;,SystemC Support in ModelSim,34,User Defined Data Types,But wait.Some operators need to be overloaded before you proceed,class my_pkt public:int num1;float num2;,bool operator=(const my_pkt,ostream,SystemC Support in ModelSim,35,Randomization,scv_smart_ptr can have its data randomizedThe seed is set by default.to change use the method:scv_random:set_global_seed(unsigned long long)Use the call to the next()method to randomize dataBut before you randomize it would be a good idea to constrain the elements in your class/struct to get a directed random stimulus,SystemC Support in ModelSim,36,Constraints,Constraints allow you to control the parameters to bound the generation of dataInherit from scv_constraint_base Use SCV_CONSTRAINT_CTOR constructorUse SCV_CONSTRAINT macro to bind elements of class/struct.,class men_constr:public scv_constraint_base public:scv_smart_ptr pkt;SCV_CONSTRAINT_CTOR(men_constr)SCV_CONSTRAINT(pkt-num1()=1,/num1 is bound between 1 and 99,num2 between 100 and 200/the sum of num1 and num2 cannot exceed 200,SystemC Support in ModelSim,37,Full Example,#include systemc.h#include scv.hclass my_pkt public:int num1;int num2;bool operator=(const my_pkt,class men_constr:public scv_constraint_base public:scv_smart_ptr pkt;SCV_CONSTRAINT_CTOR(men_constr)SCV_CONSTRAINT(pkt-num1()=1,SystemC Support in ModelSim,38,Introspection for Enum Types,enum color red=0,green=2,blue=4,orange=6,black=8,pewter=16;,Use SCV_ENUM_CTOR macro and wrap each element with SCV_ENUM macro.,templateclass scv_extensions:public scv_enum_base public:(red);(green);(blue);(orange);(black);(pewter);,SCV_ENUM_CTOR(color)SCV_ENUMSCV_ENUMSCV_ENUMSCV_ENUMSCV_ENUMSCV_ENUM,SystemC Support in ModelSim,39,Introspection for Enum Types,For Enum types scv_enum_base needs to be provided before the scv_extensions class.,struct/Struct implies a Class with Public elements,template,scv_extensions,scv_extensions,scv_extensions,SCV_EXTENSIONS_CTOR(data_t)SCV_FIELD(col);SCV_FIELD(num);,:public scv_extensions_base,Use SCV_EXTENSIONS_CTOR macro and wrap each element with SCV_FIELD macro.,data_t,color col;int num;,;,SystemC Support in ModelSim,40,Example Of Ethernet Packet,class ether_packetpublic:sc_uint preamble;sc_uint sfd;sc_uint dest;sc_uint src;sc_uint len;enum packet_type SEND_MP3,SEND_NOISE;enum ifg_gaps NORMAL_IFG,SHORT_IFG,LONG_IFG,RANDOM_IFG;,SystemC Support in ModelSim,41,SCV Extensions of Ethernet Packet,enum packet_type SEND_MP3,SEND_NOISE;,templateclass scv_extensions:public scv_enum_base public:SCV_ENUM_CTOR(packet_type)SCV_ENUM(SEND_MP3);SCV_ENUM(SEND_NOISE);,templateclass scv_extensions:public scv_enum_base public:SCV_ENUM_CTOR(ifg_gaps)SCV_ENUM(NORMAL_IFG);SCV_ENUM(SHORT_IFG);SCV_ENUM(LONG_IFG);SCV_ENUM(RANDOM_IFG);,enum ifg_gaps NORMAL_IFG,SHORT_IFG,LONG_IFG,RANDOM_IFG;,is extended to,is extended to,SystemC Support in ModelSim,42,SCV Extensions of Ethernet Packet,templateclass scv_extensions:public scv_extensions_basepublic:scv_extensions preamble;scv_extensions sfd;scv_extensions dest;scv_extensions src;scv_extensions len;SCV_EXTENSIONS_CTOR(ether_packet)/must be in order SCV_FIELD(preamble);SCV_FIELD(sfd);SCV_FIELD(dest);SCV_FIELD(src);SCV_FIELD(len);,class ether_packetpublic:sc_uint preamble;sc_uint sfd;sc_uint dest;sc_uint src;sc_uint len;,is extended to,SystemC Support in ModelSim,43,Weighted Randomization,Control the distribution of values by creat